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PIC32MX440F256H-80I Datasheet, PDF (93/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers
PIC32MX3XX/4XX
TABLE 5-3: RESET FLAG BIT OPERATION
Flag Bit
Set by:
POR (RCON<0>)
BOR (RCON<1>)
POR
POR, BOR
EXTR (RCON<7>)
SWR (RCON<6>)
MCLR Reset
Software Reset Command
CMR (RCON<9>
Configuration Mismatch
WDTO (RCON<4>)
WDT Time-Out
SLEEP (RCON<3>)
WAIT Instruction
IDLE (RCON<2>)
WAIT Instruction
Note: All Reset flag bits may be set or cleared by the user software.
5.4.1
DEVICE RESET TO CODE
EXECUTION START TIME
The delay between the end of a Reset event and when
the device actually begins to execute code is determined
by two main factors: the type of Reset and the system
clock source coming out of the Reset. The code execu-
tion start time for various types of device Resets are
characterized in Section 30.2 “AC Characteristics and
Timing Parameters”.
Cleared by:
User Software
User Software
User Software, POR, BOR
User Software, POR, BOR
User Software, POR, BOR
User Software, POR, BOR
User Software, POR, BOR
User Software, POR, BOR
TABLE 5-4: CODE EXECUTION START TIME FOR VARIOUS DEVICE RESETS
Reset Type
Clock Source
Power-Up Delay(1)(2)(3)
System Clock
Delay(4)(5)
FSCM Delay(6)
POR
EC, FRC, FRCDIV, LPRC
(TPU OR TPWRT) + TSYSDLY
—
ECPLL, FRCPLL
(TPU OR TPWRT) + TSYSDLY
TLOCK
XT, HS, SOSC
(TPU OR TPWRT) + TSYSDLY
TOST
XTPLL, HSPLL
(TPU OR TPWRT) + TSYSDLY TOST + TLOCK
BOR
EC, FRC, FRCDIV, LPRC
TSYSDLY
—
ECPLL, FRCPLL
TSYSDLY
TLOCK
XT, HS, SOSC
TSYSDLY
TOST
XTPLL
TSYSDLY
TOST + TLOCK
MCLR, CMR, Any Clock
SWR, WDTO
TSYSDLY
—
Note 1: TPU = Power-up Period with on-chip regulator enabled.
2: TPWRT = Power-up Period (POWER-UP TIMER) with on-chip regulator disabled.
3: TSYSDLY = Time required to reload Device Configuration Fuses plus 8 SYSCLK cycles.
4: TOST = Oscillator Start-up Timer.
5: TLOCK = PLL lock time.
6: TFSCM = Fail-Safe Clock Monitor delay.
—
TFSCM
TFSCM
TFSCM
—
TFSCM
TFSCM
TFSCM
—
Note: For parameter specifications, see Section 30.2 “AC Characteristics and Timing Parameters.”
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 91