PIC32MX440F256H-80I Datasheet, PDF (581/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
REGISTER 28-1: DDPCON: DEBUG DATA PORT CONTROL REGISTER
r-x
r-x
r-x
r-x
r-x
r-x
r-x
—
—
—
—
—
—
—
bit 31
r-x
—
bit 24
r-x
r-x
r-x
r-x
r-x
r-x
r-x
r-x
—
—
—
—
—
—
—
—
bit 23
bit 16
r-x
r-x
r-x
r-x
r-x
r-x
r-x
r-x
—
—
—
—
—
—
—
—
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-1
R/W-0
r-x
DDPUSB
DDPU1
DDPU2
DDPSPI1 JTAGEN
TROEN
—
bit 7
r-x
—
bit 0
Legend:
R = Readable bit
U = Unimplemented bit
W = Writable bit
P = Programmable bit
-n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
r = Reserved bit
bit 31-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Reserved: Write ‘0’; ignore read
DDPUSB: Debug Data Port Enable for USB
1 = USB peripheral ignores USBFRZ (U1CNFG1<5>) setting
0 = USB peripheral follows USBFRZ setting.
DDPU1: Debug Data Port Enable for UART1 bit
1 = UART1 peripheral ignores FRZ (U1MODE<14>) setting
0 = UART1 peripheral follows FRZ setting
DDPU2: Debug Data Port Enable for UART2 bit
1 = UART2 peripheral ignores FRZ (U2MODE<14) setting
0 = UART2 peripheral follows FRZ setting
DDPSPI1: Debug Data Port Enable for SPI1 bit
1 = SPI1 peripheral ignores FRZ (SPI1CON<14>) setting
0 = SPI1 peripheral follows FRZ setting
JTAGEN: JTAG Port Enable bit
1 = Enable JTAG Port
0 = Disable JTAG Port
TROEN: Trace Output Enable bit
1 = Enable Trace Port
0 = Disable Trace Port
Reserved: Write ‘1’; ignore read
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 579