PIC32MX440F256H-80I Datasheet, PDF (584/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
28.2.1.5 EJTAG Device Programming Using
the JTAG Interface
The JTAG interface can also be used to program
PIC32MX3XX/4XX devices in their target applications.
Using EJTAG with the JTAG interface allows application
designers to include a dedicated test and programming
port into their applications, with a single 4-pin interface,
without imposing the circuit constraints that the ICSP
interface may require.
28.2.1.6 Enhanced EJTAG Programming
Using the JTAG Interface
Enhanced EJTAG programming uses the standard
JTAG interface but uses a programming executive writ-
ten to RAM. Use of the programming executive with the
JTAG interface provides a significant improvement in
programming speed.
28.2.2 DEBUGGING
28.2.2.1 ICSP and In-Circuit Debugging
ICSP also provides a hardware channel for the In-Cir-
cuit Debugger (ICD) which allows externally controlled
debugging of software. Using the appropriate hardware
interface and software environment, users can force
the device to single step through its code, track the
actual content of multiple registers and set software
breakpoints.
The active ICSP debugger port is selected by the
ICESEL Configuration bit.
28.2.2.2 EJTAG Debugging
The industry standard EJTAG interface allows third
party EJTAG tools to be used for debugging. Using the
EJTAG interface, memory and registers can be viewed
and modified. Breakpoints can be set and the program
execution may be stopped, started or single stepped.
28.2.3
SPECIAL DEBUG MODES FOR
SELECT COMMUNICATIONS
PERIPHERALS
To aid in debugging applications certain I/O peripherals
have a user-controllable bit to override the Freeze func-
tion in the peripheral. This allows the module to
continue to send any data, buffered within the periph-
eral, even when a debugger attempts to halt the periph-
eral. The Debug mode control bits for these peripherals
are contained in the DDPCON register.
28.2.4 JTAG BOUNDARY SCAN
The JTAG boundary scan method is the process of
adding a Shift register stage adjacent to each of the
component’s I/O pins. This permits signals at the com-
ponent boundaries to be controlled and observed,
using a defined set of scan test principles. An external
tester or controller provides instructions and reads the
results in a serial fashion.
The external device also provides common clock and
control signals. Depending on the implementation,
access to all test signals is provided through a
standardized, 4-pin interface.
A typical application incorporating the JTAG boundary
scan interface is shown in Figure 28-3. In this example,
a PIC32MX3XX/4XX microcontroller is daisy-chained
to a second JTAG compliant device. Note that the TDI
line from the external tester supplies data to the TDI pin
of the first device in the chain (in this case, the micro-
controller). The resulting test data for this two-device
chain is provided from the TDO pin of the second
device to the TDO line of the tester.
This section describes the JTAG module and its gen-
eral use. Users interested in using the JTAG interface
for device programming should refer to the appropriate
PIC32MX3XX/4XX device programming specification
for more information.
DS61143E-page 582
Preliminary
© 2008 Microchip Technology Inc.