PIC32MX440F256H-80I Datasheet, PDF (60/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
REGISTER 4-1: OSCCON: OSCILLATOR CONTROL REGISTER
bit 20-19
PBDIV<1:0>: Peripheral Bus Clock Divisor
11 = PBCLK is SYSCLK divided by 8 (default)
10 = PBCLK is SYSCLK divided by 4
01 = PBCLK is SYSCLK divided by 2
00 = PBCLK is SYSCLK divided by 1
Note: On Reset these bits are set to the value of the FPBDIV Configuration bits
(DEVCFG1<13:12>).
bit 18-16
PLLMULT<2:0>: PLL Multiplier bits
111 = Clock is multiplied by 24
110 = Clock is multiplied by 21
101 = Clock is multiplied by 20
100 = Clock is multiplied by 19
011 = Clock is multiplied by 18
010 = Clock is multiplied by 17
001 = Clock is multiplied by 16
000 = Clock is multiplied by 15
Note: On Reset these bits are set to the value of the FPLLMULT Configuration bits
(DEVCFG2<6:4>).
bit 15
Reserved: Write ‘0’; ignore read
bit 14-12
COSC<2:0>: Current Oscillator Selection bits
111 = Fast Internal RC Oscillator divided by OSCCON<FRCDIV> bits
110 = Fast Internal RC Oscillator divided by 16
101 = Low-Power Internal RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL or ECPLL)
010 = Primary Oscillator (XT, HS or EC)
001 = Fast RC Oscillator with PLL module divided by 2 (FRCPLL)
000 = Fast RC Oscillator (FRC)
Note: On Reset these bits are set to the value of the FNOSC Configuration bits (DEVCFG1<2:0>).
bit 11
Reserved: Write ‘0’; ignore read
bit 10-8
NOSC<2:0>: New Oscillator Selection bits
111 = Fast Internal RC Oscillator divided by OSCCON<FRCDIV> bits
110 = Fast Internal RC Oscillator divided by 16
101 = Low-Power Internal RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL or ECPLL)
010 = Primary Oscillator (XT, HS or EC)
001 = Fast Internal RC Oscillator with PLL module via Postscaler (FRCPLL)
000 = Fast Internal RC Oscillator (FRC)
Note: On Reset these bits are set to the value of the FNOSC Configuration bits (DEVCFG1<2:0>).
bit 7
CLKLOCK: Clock Selection Lock Enable bit
If FSCM is enabled (FCKSM1 = 1):
1 = Clock and PLL selections are locked.
0 = Clock and PLL selections are not locked and may be modified
If FSCM is disabled (FCKSM1 = 0):
Note: Clock and PLL selections are never locked and may be modified.
bit 6
ULOCK: USB PLL Lock Status bit
1 = Indicates that the USB PLL module is in lock or USB PLL module start-up timer is satisfied
0 = Indicates that the USB PLL module is out of lock or USB PLL module start-up timer is in progress
or USB PLL is disabled
bit 5
LOCK: PLL Lock Status bit
1 = PLL module is in lock or PLL module start-up timer is satisfied
0 = PLL module is out of lock, PLL start-up timer is running or PLL is disabled
DS61143E-page 58
Preliminary
© 2008 Microchip Technology Inc.