PIC32MX440F256H-80I Datasheet, PDF (236/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
10.7 CRC Module Operation
The DMA module has one integrated CRC generation
module shared by all channels. The CRC module is a
highly configurable, 16-bit CRC generator. The CRC
module can be assigned to any available DMA chan-
nel by setting the CRCCH bits (DCRCCON<1:0>)
appropriately. The CRC is enabled by setting the
CRCEN bit (DCRCCON<7>).
The CRC generator will take 1 system clock to process
each byte of data read from the source. This implies
that if 32 bits of data are read from the source, the
CRC generation will take 4 system clocks to process
the data.
The CRC module modifies the behavior of the DMA
channel associated with the CRC module. The two
operating modes for a DMA channel associated with
the CRC module are:
• Background Mode: CRC is calculated in the
background, with normal DMA behavior
maintained.
• Append Mode: Data read from the source is not
written to the destination, but the CRC data is
accumulated in the CRC data register. The accu-
mulated CRC is written to the destination address
when a block transfer completes.
CRC Configurable resources:
• The terms of the polynomial can be programmed
using the DCRCXOR<15:0> bits. Considering the
CRC polynomial: x¹⁶ + x¹² + x⁵ + 1, 17 bits are
needed to define this polynomial. However, the
value to be written to the DCRCXOR register will
be 0b0001 0000 0010 0000, i.e., 0x1020.
Note: The LSb and MSb do not have to be
specified, they are always set. The actual
value used for the polynomial generator
will be 0x11021.
• The length of the polynomial generator can be
programmed using the PLEN (DCRCCON<11:8>)
bits. For the above polynomial, the size will be 16.
The PLEN will be programmed with length -1, i.e.,
0x0F.
• The CRC module can be assigned to any avail-
able DMA channel by setting the CRCCH bits
(DCRCCON<2:0>) appropriately.
• The CRC is enabled by setting the CRCEN bit
(DCRCCON<7>).
• The CRC generator can be seeded by writing to
the DCRCDATA register before enabling the
channel that will use the CRC module.
• The CRC can be read as it progresses by reading
the DCRCDATA register at any time during the
CRC generation.
• Data Order: As data is read from the source regis-
ter, the data is fed into the CRC generator MSB
first.
10.8 CRC Background Mode
The CRC Background mode is enabled by clearing
CRCAPP (DCRCCON<6>).
In this mode, the behavior of the DMA channel is
maintained with data read from the channel source
being passed to the CRC module and then written
back to the destination.
In the Background mode, the calculated CRC is left in
the DCRCDATA register at the end of the block
transfer.
This mode can be used to calculate a CRC as data is
moved from source to destination. A good example of
where this can be used is to calculate a CRC as data
is transmitted to or received from the UART module.
When the data transfer is complete the user can read
the calculated CRC and either append it to the
transmitted data or verify the received CRC data.
10.8.1 CRC BACKGROUND MODE
CONFIGURATION
Microchip recommends taking the following steps to
configure a CRC calculation in Background mode:
• Seed the CRC generator by writing the initial seed
to the DCRCDATA register.
• Set the polynomial generator by writing to the
DCRCXOR register.
• Set the polynomial generator length by writing the
PLEN (DCRCCON<11:8>).
• Attach the CRC calculation to the desired DMA
channel performing the transfer by writing the
CRCCH (DCRCCON<2:0>).
• Use the Background mode by clearing the
CRCAPP (DCRCCON<6>) bit.
• Enable the CRC calculation by setting the
CRCEN (DCRCCON<7>).
• Once the DMA transfer begins, the CRC
calculation will begin as well.
• Once the DMA transfer ends, the CRC result will
be available by reading the DCRCDATA register.
Refer to Example 10-4.
Note:
The configuration steps specific for the
CRC configuration are shown. The DMA
transfer configuration is the same as
previously explained (see Section 10.2
“DMA Controller Operation”).
DS61143E-page 234
Preliminary
© 2008 Microchip Technology Inc.