PIC32MX440F256H-80I Datasheet, PDF (83/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
EXAMPLE 4-2: PERFORMING A CLOCK SWITCH
// note: clock switching must be enabled in the device configuration
SYSKEY = 0x0;
// write invalid key to force lock
SYSKEY = 0xAA996655;
// Write Key1 to SYSKEY
SYSKEY = 0x556699AA;
// Write Key2 to SYSKEY
// OSCCON is now unlocked
// make the desired change
OSCCONCLR = 7 << 8;
// clear the clock select bits
OSCCONSET = 7 << 8;
// set the new clock source to FRC
OSCCONSET = 1;
// request clock switch
// Relock the SYSKEY
SYSKEY = 0x0;
// Write any value other than Key1 or Key2
// OSCCON is relocked
4.2.6.4
Entering Sleep Mode During a Clock
Switch
If the device enters Sleep mode during a clock switch
operation, the clock switch operation is aborted. The
processor keeps the old clock selection and the
OSWEN bit (OSCCON<0>) is cleared. The WAIT
instruction is then executed normally.
4.2.6.5 SOSC Control
The SOSC can be used by modules, as well as the
CPU. Therefore, the SOSC is controlled by a combina-
tion of software and hardware. Setting the SOSCEN bit
(OSCCON<1>) to a ‘1’ enables the SOSC. The SOSC
is disabled when it is not being used by the CPU mod-
ule and the SOSCEN bit is ‘0’. If the SOSC is being
used as SYSCLK, such as after a clock switch, it can-
not be disabled by writing to the SOSCEN bit. If the
SOSC is enabled by the SOSCEN bit, it will continue to
operate when the device is in SLEEP. To prevent inad-
vertent clock changes the OSCCON register is locked.
It must be unlocked prior to software enabling or
disabling the SOSC.
4.3 Input/Output Pins
The pins used by the POSC and SOSC are shared by
other peripherals modules. Table shows the function of
these shared pins in the available oscillator modes.
When the pins are not used by a oscillator they are
available for use as general I/O pins or by use by a
peripheral sharing the pin.
TABLE 4-8:
Pin Name
CONFIGURATION OF PINS ASSOCIATED WITH THE OSCILLATOR MODULE
Clock Mode
Configuration Bit FIeld⁽¹⁾ TRIS
Pin Type
OSCI
HS, HSPLL, XT, XTPLL
COSC<2:0>, POSCMD<1:0> X
OSC
OSCO
HS, HSPLL, XT, XTPLL
COSC<2:0>, POSCMD
X
OSC
OSCI
EC, ECPLL
COSC<2:0>, POSCMD
X
CLOCK IN
OSCO
EC, ECPLL
COSC<2:0>, POSCMD,
OSCOFNC
X
PBCLK OUT
OSCO
EC, ECPLL
COSC<2:0>, POSCMD,
OSCOFNC
INPUT
INPUT
OSCO
EC, ECPLL
COSC<2:0>, POSCMD,
OSCOFNC
OUTPUT
OUTPUT
N/A
FRC, FRCPLL, FRCDIV16, FRCDIV, LPRC
COSC<2:0>
X
GPIO
N/A
FRC, FRCPLL, FRCDIV16, FRCDIV, LPRC
COSC<2:0>
X
GPIO
N/A
FRC, FRCPLL, FRCDIV16, FRCDIV, LPRC
COSC<2:0>
X
GPIO
N/A
FRC, FRCPLL, FRCDIV16, FRCDIV, LPRC
COSC<2:0>
X
GPIO
SOSCI
SOSC
COSC<2:0>
X
OSC
SOSCO
SOSC
COSC<2:0>
X
OSC
Note 1: During device start-up, the device oscillator configuration data is copied from device configuration to
COSC.
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 81