PIC32MX440F256H-80I Datasheet, PDF (238/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
10.9 CRC Append Mode
The CRC Append mode is enabled by setting
CRCAPP (DCRCCON<6>).
In this mode, the behavior of the DMA channel is
changed.
Data read from the source will be fed into the CRC
generation module. No data is written to the destina-
tion address in CRC Append mode until a block trans-
fer completes or a pattern match occurs. On
completion, the CRC value will be written to the
address given by the Destination register (DCHxDSA).
This mode can be used for the CRC calculation of a
memory buffer, without actually performing a DMA
transfer to a destination.
CRC Append mode Features:
• Only the source is considered when deciding if a
block transfer is complete.
• The destination address (DCHxDSA) is only used
as the location to write the generated CRC to.
• The destination size (DCHxDSIZ) can have a
maximum size of 4.
- If DCHxDSIZ is greater than 4, only 4 bytes are
written at the end of the transfer.
- If DCHxDSIZ is less than 4, only DCHxDSIZ bytes
of the CRC are written to the destination address.
- The high bytes (bits 31:16) are written as 0’s if
more than 16 bits of the CRC are written.
- PLEN (CRCCON<11:8>) has no effect on the
number of CRC bits that will be written to the
Destination register.
• No CRC written back on an abort IRQ, user abort,
bus error, etc.
10.9.1 CRC APPEND MODE
CONFIGURATION
Microchip recommends taking the following steps to
configure a CRC calculation in Background mode:
• Seed the CRC generator by writing the initial seed
to the DCRCDATA register.
• Set the polynomial generator by writing to the
DCRCXOR register.
• Set the polynomial generator length by writing the
PLEN (DCRCCON<11:8>).
• Attach the CRC calculation to the desired DMA
channel performing the transfer by writing the
CRCCH (DCRCCON<2:0>).
• Use the Append mode by setting the CRCAPP
(DCRCCON<6>) bit.
• Enable the CRC calculation by setting the
CRCEN (DCRCCON<7>).
• Program the DMA transfer destination with the
physical address of a variable where the CRC is
to be stored.
• Once the DMA transfer begins, the CRC
calculation will begin as well.
• Once the DMA transfer ends, the CRC result will
be deposited at the programmed DMA destination
address.
Refer to Example 10-5.
Note:
The configuration steps specific for the
CRC configuration are shown. The DMA
transfer configuration is the same as
previously explained (see Section 10.2
“DMA Controller Operation”).
DS61143E-page 236
Preliminary
© 2008 Microchip Technology Inc.