PIC32MX440F256H-80I Datasheet, PDF (506/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
22.3.1 CONFIGURING ANALOG PORT
PINS
The AD1PCFG register and the TRISB register control
the operation of the ADC port pins.
AD1PCFG specifies the configuration of device pins to
be used as analog inputs. A pin is configured as an
analog input when the corresponding PCFGn bit
(AD1PCFG<n>) = 0. When the bit = 1, the pin is set to
digital control. When configured for analog input, the
associated port I/O digital input buffer is disabled so it
does not consume current. The AD1PCFG register is
cleared at Reset, causing the ADC input pins to be
configured for analog input by default at Reset.
TRIS registers control the digital function of the port
pins. The port pins that are desired as analog inputs
must have their corresponding TRIS bit set, specifying
the pin as an input. If the I/O pin associated with an
ADC input is configured as an output, the TRIS bit is
cleared and the ports digital output level (VOH or VOL)
will be converted. After a device Reset, all TRIS bits are
set.
Notes:
When reading a PORT register that
shares pins with the ADC, any pin config-
ured as an analog input reads as a ‘0’
when the PORT latch is read.
Analog levels on any pin that is defined as
a digital input (including the AN15:AN0
pins), but is not configured as an analog
input, may cause the input buffer to con-
sume current that is out of the device’s
specification.
22.3.2 SELECTING THE ANALOG INPUTS
TO THE ADC MUXS
The AD1CHS register is used to select which analog
input pin is connected to MUX A and MUX B. Each
MUX has two inputs referred to as the positive and the
negative input. The positive input to MUX A is con-
trolled by CH0SA<4:0> and the negative input is con-
trolled by CH0NA. The positive input for MUX B is
controlled by CH0SB<4:0> and the negative input is
controlled by CH0NB.
The positive input can be selected from any one of the
available analog input pins. The negative input can be
selected as the ADC negative reference or AN0. The
use of AN0 as the negative input allows the ADC to be
used in a Unipolar Differential mode. Refer to the
device data sheet for AN0 input voltage restrictions
when used as a negative reference.
22.3.3 SELECTING THE FORMAT OF THE
ADC RESULT
The data in the ADC Result register can be read as one
of eight formats. The format is controlled by
FORM<2:0> (AD1CON1<10:8>). The user can select
from integer, signed integer, fractional or signed
fractional as a 16-bit or 32-bit result.
22.3.3.1 Selecting the Sample Clock Source
It is often desirable to synchronize the end of sampling
and the start of conversion with some other time event.
The ADC module may use one of four sources as a
conversion trigger. The selection of the conversion trig-
ger source is controlled by the SSRC<2:0>
(AD1CON1<7:5>) bits.
22.3.3.2 Manual Conversion
To configure the ADC to end sampling and start a con-
version when SAMP is cleared (= 0), SSRC is set to
‘000’.
22.3.3.3 Timer Compare Trigger
The ADC is configured for this Trigger mode by setting
SSRC<2:0> = 010. When a period match occurs for
the 32-bit timer, TMR3/TMR2, or the 16-bit Timer3, a
special A/D converter trigger event signal is generated
by Timer3.
22.3.3.3.1 External INT0 Pin Trigger
To configure the ADC to begin a conversion on an
active transition on the INT0 pin, SSRC<2:0> is set to
‘001’. The INT0 pin may be programmed for either a
rising edge input or a falling edge input to trigger the
conversion process.
22.3.3.3.2 Auto-Convert
The ADC can be configured to automatically perform
conversions at the rate selected by the Auto-Sample
Time bits, SAMC<4:0>. The ADC is configured for this
Trigger mode by setting SSRC<2:0> = 111. In this
mode, the ADC will perform continuous conversions on
the selected channels.
DS61143E-page 504
Preliminary
© 2008 Microchip Technology Inc.