PIC32MX440F256H-80I Datasheet, PDF (336/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
13.4 Reading and Writing TMR1
Register
Due to the asynchronous nature of Timer1 operating in
Asynchronous Clock mode, reading and writing to the
TMR1 Count register requires synchronization
between the asynchronous clock source and the inter-
nal PBCLK (Peripheral Bus Clock). Timer1 features a
Timer Write Disable (TWDIS) control bit (T1CON<12>)
and a TWIP (TImer Write in Progress) Status bit
(T1CON<11>). These bits provide the user with 2
options for safely writing to the TMR1 Count register
while Timer1 is enabled. These bits have no affect in
Synchronous Clock modes.
• Option 1 – Legacy Timer1 Write mode, TWDIS bit
= 0. To determine when it is safe to write to the
TMR1 Count register, it is recommended to poll
the TWIP bit. When TWIP = 0, it is safe to perform
the next write operation to the TMR1 Count regis-
ter. When TWIP = 1, the previous write operation
to the TMR1 Count register is still being synchro-
nized and any additional write operations should
wait until TWIP = 0.
• Option 2 – New synchronized Timer1 Write mode,
TWDIS bit = 1. A write to the TMR1 Count register
can be performed at any time. However, if the pre-
vious write operation to the TMR1 Count register
is still being synchronized, any additional write
operations are ignored.
Writing to the TMR1 Count register requires 2 to 3
asynchronous external clock cycles for the value to be
synchronized into the TMR1 Count register.
Reading from the TMR1 Count register requires 2
PBCLK cycle delays between the current unsynchro-
nized value in the TMR1 Count register and the
synchronized value returned by the read operation. In
other words, the value read is always 2 PBCLK cycles
behind the actual value in the TMR1 Count register.
The following steps should be performed to properly
configure the Timer1 peripheral for Asynchronous
Counter mode operation.
1. Clear control bit, ON (T1CON<15>) = 0, to
disable Timer1.
2. Select the desired timer prescaler using bits,
TCKPS<1:0> (T1CON<5:4).
3. Set control bit, TCS (T1CON<1>) = 1, to select
an external clock source.
4. Set control bit, TSYNC (T1CON<2>) = 0, to
disable synchronization.
5. Clear Timer Register, TMR1.
6. Load Period Register, PR1, with desired 16-bit
match value.
7. If timer interrupts are used, refer to 13.5 “Timer
Interrupts” for interrupt configuration steps.
8. Set control bit, ON (T1CON<15>) = 1, to enable
Timer1.
EXAMPLE 13-3:
ASYNCHRONOUS
EXTERNAL TIMER
INITIALIZATION
T1CON = 0x0;
T1CON = 0x0012;
TMR1 = 0x0;
PR1 = 0x7FFF;
// Stop Time and reset
// Set prescaler at 1:8,
// external clock source,
// asynchronous mode
// Clear timer register
// Load period register
T1CONSET = 0x8000; // Start Timer
DS61143E-page 334
Preliminary
© 2008 Microchip Technology Inc.