PIC32MX440F256H-80I Datasheet, PDF (486/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
EXAMPLE 21-7: UPDATING THE RTCC CALIBRATION VALUE
/*
The following code example will update the RTCC calibration.
*/
int cal=0x3FD;
// 10 bits adjustment, -3 in value
if(RTCCON&0x8000)
{
unsigned intt0, t1;
do
{
t0=RTCTIME;
t1=RTCTIME;
}while(t0!=t1);
if((t0&0xFF)==00)
{
while(!(RTCCON&0x2));
}
}
// RTCC is ON
// read valid time value
// we’re at second 00, wait auto-adjust to be performed
// wait until second half...
RTCCONCLR=0x03FF0000;
RTCCONSET=cal;
// clear the calibration
21.5 RTCC Interrupts
The RTCC alarm can be configured to generate an
interrupt at every alarm event. Refer to Section 21.3
“Alarm Mode” for details regarding the various alarm
events.
The RTCC module is enabled as a source of interrupts
via the respective RTCC interrupt enable bit:
• RTCCIE (IEC1<15>).
The alarm interrupt is signalled by the corresponding
RTCC interrupt flag bit:
• RTCCIF (IFS1<15>).
This interrupt flag must be cleared in software.
The interrupt priority level bits and interrupt subpriority
level bits must be also be configured:
• RTCCIP<2:0> (IPC8<28:26>)
• RTCCIS<1:0> (IPC8<25:24>)
In addition to enabling the RTCC interrupt, an Interrupt
Service Routine, ISR, is required (see Example 21-9).
Note:
It is the user’s responsibility to clear the
corresponding interrupt flag bit before
returning from an ISR.
DS61143E-page 484
Preliminary
© 2008 Microchip Technology Inc.