PIC32MX440F256H-80I Datasheet, PDF (87/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
REGISTER 5-1: RCON: RESET CONTROL REGISTER⁽³⁾
r-x
r-x
r-x
r-x
r-x
r-x
r-x
r-x
—
—
—
—
—
—
—
—
bit 31
bit 24
r-x
r-x
r-x
r-x
r-x
r-x
r-x
r-x
—
—
—
—
—
—
—
—
bit 23
bit 16
r-x
r-x
r-x
r-x
r-x
r-0
R/W-0
R/W-0
—
—
—
—
—
—
CMR
VREGS
bit 15
bit 8
R/W-0
R/W-0
r-x
R/W-0
R/W-0
R/W-0
R/W-1
R/W-1
EXTR
SWR
—
WDTO
SLEEP
IDLE
BOR
POR
bit 7
bit 0
Legend:
R = Readable bit
U = Unimplemented bit
W = Writable bit
P = Programmable bit
-n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
r = Reserved bit
bit 31-10
Reserved: Write ‘0’; ignore read
bit 9
CMR: Configuration Mismatch Flag bit
1 = A Configuration Mismatch Reset has occurred
0 = A Configuration Mismatch Reset has not occurred
Note: This bit is set in hardware, it can only be cleared (= 0) in software.
bit 8
VREGS: Voltage Regulator Standby Enable bit
1 = Regulator will be active during Sleep
0 = Regulator will go to Standby mode during Sleep
bit 7
EXTR: External Reset (MCLR) Pin Flag bit
1 = A Master Clear (pin) Reset has occurred
0 = A Master Clear (pin) Reset has not occurred
Note: This bit is set in hardware, it can only be cleared (= 0) in software.
bit 6
SWR: Software Reset Flag bit
1 = A Software Reset was executed
0 = A Software Reset was not executed
Note: This bit is set in hardware, it can only be cleared (= 0) in software.
bit 5
Reserved: Write ‘0’; ignore read
bit 4
WDTO: Watchdog Timer Time-out Flag bit
1 = WDT time-out has occurred
0 = WDT time-out has not occurred
Note: This bit is set in hardware, it can only be cleared (= 0) in software.
bit 3
SLEEP: Wake From Sleep Flag bit
1 = Device was in Sleep mode
0 = Device was not in Sleep mode
Note: This bit is set in hardware, it can only be cleared (= 0) in software.
Note 1: User must clear this bit to view next detection.
2: BOR is also set after a Power-on Reset.
3: The RCON flag bits only serve as status bits. Setting a particular Reset status bit in software will not cause
a device Reset to occur.
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 85