PIC32MX440F256H-80I Datasheet, PDF (356/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
EXAMPLE 14-9: TIMER ISR
void __ISR(_TIMER_2_VECTOR, ipl3) T2_Interrupt_ISR(void)
{
... perform application specific operations in response to the interrupt
IFS0CLR = 0x00000100; // Be sure to clear the Timer2 interrupt status
}
void__ISR(TIMER_5_VECTOR. ipl1) T5_Interrupt_ISR(void)
{
...perform application specific operations in response to the interrupt
IFS0CLR = 0x10000000; // Be sure to clear the Timer5 interrupt status
}
Note: The timer ISR code example shows MPLAB^® C32 Compiler specific syntax. Refer to your compiler manual
regarding support for ISRs.
14.5 I/O Pin Configuration
The table below provides a summary of I/O pin
resources associated with the timer modules. The table
shows the settings required to make an I/O pin
available for a specific Timer module.
TABLE 14-2:
I/O PIN CONFIGURATION FOR USE WITH TIMER MODULES
Required Settings for Module
Pin Control
I/O Pin
Name
T2CK
T3CK
T4CK
T5CK
Required
Module
Enable⁽²⁾
Bit Field⁽²⁾
Yes⁽¹⁾
ON
TCS,
TGATE
Yes¹⁾
ON
TCS,
TGATE
Yes⁽¹⁾
ON
TCS,
TGATE
Yes⁽¹⁾
ON
TCS,
TGATE
TRIS
Input
Input
Input
Input
Pin
Type
I
Buffer
Type
Description
ST Timer2 External Clock/Gate Input
I
ST Timer3 External Clock/Gate Input
I
ST Timer4 External Clock/Gate Input
I
ST Timer5 External Clock/Gate Input
Legend:
CMOS = CMOS compatible input or output
I = Input O = Output
ST = Schmitt Trigger input with CMOS levels
Note 1: These pins are only required for modes using gated timer or external clock inputs. Otherwise, these pins can be used for
general purpose I/O and require the user to set the corresponding TRIS register bits. TxCK pins not available on 64-pin
devices.
2: These bits are located in the TxCON register.
DS61143E-page 354
Preliminary
© 2008 Microchip Technology Inc.