PIC32MX440F256H-80I Datasheet, PDF (407/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
17.2.5 SPI MASTER MODE CLOCK
FREQUENCY
In Master mode, the SPI module clock source is the
peripheral bus clock (PBCLK) and the SCK clock baud
rate is derived from the PBCLK clock and the SPIxBRG
register.
Equation 17-1 defines the SCKx clock frequency as a
function of the SPIxBRG register settings.
EQUATION 17-1: SPI CLOCK FREQUENCY
F_SCK =
F_PB
2 * (SPIxBRG+1)
Note that the maximum possible baud rate is
F_PB/2 (SPIXBRG = 0) and the minimum possible baud
rate is F_PB /1024.
Sample SPI clock frequencies are shown in the table
Table 17-6.
Note:
The SCKx signal clock is not free running
for nonframed SPI modes. It will only run
for 8, 16 or 32 pulses when the SPIxBUF
is loaded with data. It will however, be
continuous for Framed modes.
TABLE 17-6: SAMPLE SCKX FREQUENCIES
SPIxBRG setting
0
15
31
F_PB = 50 MHz
F_PB = 40 MHz
F_PB = 25 MHz
F_PB = 20 MHz
F_PB = 10 MHZ
25.00 MHz
20.00 MHz
12.50 MHz
10.00 MHz
5.00 MHz
1.56 MHz
1.25 MHz
781.25 KHz
625.00 KHz
312.50 KHz
781.25 KHz
625.00 KHz
390.63 KHz
312.50 KHz
156.25 KHz
17.2.6 SPI Error Handling
When a new data word has been shifted into shift reg-
ister SPIxSR and the previous contents of receive reg-
ister SPIxRXB have not been read by the user
software, the SPIROV bit (SPIxSTAT<6>) will be set.
The module will not transfer the received data from
SPIxSR to the SPIxRXB. Further data reception is dis-
abled until the SPIROV bit is cleared. The SPIROV bit
is not cleared automatically by the module and must be
cleared by the user software.
63
390.63 KHz
312.50 KHz
195.31 KHz
156.25 KHz
78.13 KHz
85
290.7 KHz
232.56 KHz
145.35 KHz
116.28 KHz
58.14 KHz
127
195.31 KHz
156.25 KHz
97.66 KHz
78.13 KHz
39.06 KHz
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 405