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PIC32MX440F256H-80I Datasheet, PDF (521/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers
PIC32MX3XX/4XX
22.6.2 ADC SAMPLING REQUIREMENTS
The analog input model of the 10-bit A/D converter is
shown in Figure 22-6. The total acquisition time for the
A/D conversion is a function of the internal amplifier
settling time and the holding capacitor charge time.
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (CHOLD) must be allowed
to fully charge to the voltage level on the analog input
pin. The analog output source impedance (RS), the
interconnect impedance (RIC) and the internal sam-
pling switch (RSS) impedance combine to directly affect
the time required to charge the CHOLD. The combined
impedance of the analog sources must therefore be
small enough to fully charge the holding capacitor
within the chosen sample time. To minimize the effects
of pin leakage currents on the accuracy of the A/D con-
verter, the maximum recommended source imped-
ance, RS, is 5 kΩ for the conversion rates of up to 400
ksps and a maximum of 500Ω for conversion rates of
up to 500 ksps). After the analog input channel is
selected (changed), this acquisition function must be
completed prior to starting the conversion. The internal
holding capacitor will be in a discharged state prior to
each sample operation.
At least 1 TAD time period should be allowed between
conversions for the acquisition time. For more details,
see the device electrical specifications.
FIGURE 22-6:
10-BIT A/D CONVERTER ANALOG INPUT MODEL
Rs ANx
VA
CPIN
VDD
VT = 0.6V
VT = 0.6V
RIC ≤ 250Ω
ILEAKAGE
± 500 nA
Sampling
Switch
RSS
RSS ≤ 3 kΩ
CHOLD
= DAC Capacitance
= 4.4 pF
VSS
Note: CPIN value depends on device package and is not tested. Effect of CPIN negligible if Rs ≤ 5 kΩ.
Legend
CPIN = input capacitance
VT = threshold voltage
RSS = sampling switch resistance
RIC = interconnect resistance
RS = source resistance
CHOLD = sample/hold capacitance (from DAC)
ILEAKAGE = leakage current at the pin due to various junctions
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 519