PIC32MX440F256H-80I Datasheet, PDF (645/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
R
RCON Register
Bit Status During Initialization ..................................... 90
Using the RCON Status Bits ....................................... 90
Refer ................................................................................. 236
Registers
10-bit A/D Converter Special Function...................... 492
AD1CON1 (A/D Control 1) ........ 494, 498, 499, 500, 501
AD1CON2 (A/D Control 1) ........................................ 496
ADCHS A/D Input Select .......................................... 499
ADPCFG A/D Port Configuration .............................. 500
CMCON (Comparator Control) ......................... 540, 542
OSCCON (Oscillator Control) ............................. 57, 523
RCON (Reset Control) ................................................ 86
Reset
Brown-out Reset (BOR) .............................................. 89
Configuration Mismatch .............................................. 89
MCLR Reset ............................................................... 88
Power-on Reset (POR) ............................................... 88
Software RESET Instruction (SWR) ........................... 88
Watchdog Time-out Reset (WDTR) ............................ 89
RTCC
Alarm
Configuring ....................................................... 480
Mask Settings ................................................... 480
Operation
Calibration......................................................... 483
Write Lock ......................................................... 478
S
Selecting A/D Conversion Clock ....................................... 506
Selecting the Voltage Reference Source .......................... 505
Serial Peripheral Interface (SPI) ........................ 83, 197, 383,
439, 467, 555
Setup for Continuous Output Pulse Generation................ 378
Setup for Single Output Pulse Generation ........................ 376
Sleep Mode
and FSCM Delay....................................................... 530
Clock Selection on Wake-up from............................. 529
Delay on Wake-up from ............................................ 529
Delay Times for Exit.................................................. 529
Slow Oscillator Start-up .................................................... 530
Software Simulator (MPLAB SIM)..................................... 590
Special Features ............................................................... 565
SPI
Error Handling........................................................... 405
T
Test Access Port (TAP), Controller ................................... 583
Timer1 Module .......................................... 125, 177, 327, 339
Timing Diagrams
10-bit A/D Conversion (CHPS = 01,
SIMSAM = 0, ASAM = 0, SSRC = 000) ............ 624
I2Cx Bus Data (Master Mode) .................................. 617
I2Cx Bus Data (Slave Mode) .................................... 619
I2Cx Bus Start/Stop Bits (Master Mode) ................... 617
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 619
Input Capture (CAPx)................................................ 609
OC/PWM................................................................... 610
Output Compare (OCx)............................................. 609
Parallel Master Port Write ................................. 627, 628
Parallel Slave Port .................................................... 626
SPIx Master Mode (CKE = 0) ................................... 611
SPIx Master Mode (CKE = 1) ................................... 612
SPIx Slave Mode (CKE = 0) ..................................... 613
SPIx Slave Mode (CKE = 1) ..................................... 615
Timer1, 2, 3, 4, 5, 6, 7, 8, 9 External Clock .............. 607
Timing Requirements
CLKO and I/O ........................................................... 604
Timing Specifications
I2Cx Bus Data Requirements (Master Mode)........... 618
I2Cx Bus Data Requirements (Slave Mode)............. 619
Output Compare Requirements................................ 610
Simple OC/PWM Mode Requirements ..................... 610
SPIx Master Mode (CKE = 0) Requirements............ 611
SPIx Master Mode (CKE = 1) Requirements............ 612
SPIx Slave Mode (CKE = 1) Requirements.............. 616
U
UART
Infrared Support........................................................ 436
IrDA
Built-in Encoder and Decoder........................... 436
External Support, Clock Output ........................ 436
Operation of UxCTS and UxRTS Control Pins ......... 436
Receiving
8-bit or 9-bit Data Mode.................................... 436
Transmitting
Break and Sync Sequence ............................... 436
USB
Interrupts .................................................................. 298
Operation.................................................................. 278
V
VDDCORE/VCAP Pin ........................................................... 576
Voltage Reference Specifications..................................... 600
Voltage Regulator (On-Chip) ............................................ 576
W
Watchdog Timer ............................................................... 561
Enabling and Disabling............................................. 561
Operation.................................................................. 561
Period Selection ....................................................... 561
Prescalers................................................................. 562
Resetting .................................................................. 561
Software Controlled .................................................. 561
WWW, On-Line Support ....................................................... 8
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 643