PIC32MX440F256H-80I Datasheet, PDF (315/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
TABLE 12-7: PORTG SFR SUMMARY
Virtual
Address
Name
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1 24/16/8/0
BF88_6180 TRISG 31:24
—
—
—
—
—
—
—
—
23:16
—
—
—
—
—
15:8 TRISG15⁽¹⁾ TRISG14⁽¹⁾ TRISG13⁽¹⁾ TRISG12⁽¹⁾
—
7:0 TRISG7 TRISG6
—
—
TRISG3
—
—
TRISG2
—
—
TRISG9 TRISG8
TRISG1⁽¹⁾ TRISG0⁽¹⁾
BF88_6184 TRISGCLR 31:0
Write clears selected bits in TRISG, read yields undefined value
BF88_6188 TRISGSET 31:0
Write sets selected bits in TRISG, read yields undefined value
BF88_618C TRISGINV 31:0
Write inverts selected bits in TRISG, read yields undefined value
BF88_6190 PORTG 31:24
—
—
—
—
—
—
—
—
23:16
15:8
7:0
—
RG15⁽¹⁾
RG7
—
RG14⁽¹⁾
RG6
—
RG13⁽¹⁾
—
—
RG12⁽¹⁾
—
—
—
RG3
—
—
RG2
—
RG9
RG1⁽¹⁾
—
RG8
RG0⁽¹⁾
BF88_6194 PORTGCLR 31:0
Write clears selected bits in PORTG, read yields undefined value
BF88_6198 PORTGSET 31:0
Write sets selected bits in PORTG, read yields undefined value
BF88_619C PORTGINV 31:0
Write inverts selected bits in PORTG, read yields undefined value
BF88_61A0 LATG 31:24
—
—
—
—
—
—
—
—
23:16
—
—
—
—
15:8 LATG15⁽¹⁾ LATG14⁽¹⁾ LATG13⁽¹⁾ LATG12⁽¹⁾
7:0 LATG7 LATG6
—
—
—
—
LATG3
—
—
LATG2
—
LATG9
LATG1⁽¹⁾
—
LATG8
LATG0⁽¹⁾
BF88_61A4 LATGCLR 31:0
Write clears selected bits in LATG, read yields undefined value
BF88_61A8 LATGSET 31:0
Write sets selected bits in LATG, read yields undefined value
BF88_61AC LATGINV 31:0
Write inverts selected bits in LATG, read yields undefined value
BF88_61B0 ODCG 31:24
—
—
—
—
—
—
—
—
23:16
—
—
—
—
—
15:8 ODCG15⁽¹⁾ ODCG14⁽¹⁾ ODCG13⁽¹⁾ ODCG12⁽¹⁾
—
7:0 ODCG7 ODCG6
—
—
ODCG3
—
—
ODCG2
—
—
ODCG9 ODCG8
ODCG1⁽¹⁾ ODCG0⁽¹⁾
BF88_61B4 ODCGCLR 31:0
Write clears selected bits in ODCG, read yields undefined value
BF88_61B8 ODCGSET 31:0
Write sets selected bits in ODCG, read yields undefined value
BF88_61BC ODCGINV 31:0
Write inverts selected bits in ODCG, read yields undefined value
Note 1:
2:
TRIS, PORT, LAT and ODC bit(s) are not implemented on 64-pin devices, and read as ‘0’.
On specific 100-pin devices, the instruction TRACE port is multiplexed with PORTA pins RA6, RA7; PORTG pins RG12,
RG13 and RG14. At Power-on Reset, these pins are general purpose I/O pins. To maintain these pins as general pur-
pose I/O pins, the user’s application code must maintain TROEN (DDPCON<2>) bit = 0. To use these pins as instruction
TRACE pins, TROEN must be set = 1.
© 2008 Microchip Technology Inc.
Preliminary
DS61143E - page 313