PIC32MX440F256H-80I Datasheet, PDF (52/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
TABLE 3-1:
Instruction
NOP
NOR
OR
ORI
RDHWR
RDPGPR
RESTORE
ROTR
ROTRV
SAVE
SB
SC
SDBBP
SEB
SEH
SH
SLL
SLLV
SLT
SLTI
SLTIU
SLTU
SRA
SRAV
SRL
SRLV
SSNOP
SUB
SUBU
SW
SWL
PIC32MX3XX/4XX INSTRUCTION SET (CONTINUED)
Description
Function
No Operation
(Assembler idiom for: SLL r0, r0, r0)
Logical NOR
Rd = ~(Rs | Rt)
Logical OR
Rd = Rs | Rt
Logical OR Immediate
Rt = Rs | Immed
Read Hardware Register
Allows unprivileged access to registers
enabled by HWREna register
Read GPR from Previous Shadow Set
Restore registers and deallocate stack frame
(MIPS16e™ only)
Rt = SGPR[SRSCtl_PSS, Rd>
See Architecture Reference Manual
Rotate Word Right
Rd = Rt_sa-1..0 || Rt_31..sa
Rotate Word Right Variable
Rd = Rt_Rs-1..0 || Rt_31..Rs
Save registers and allocate stack frame (MIPS16e only) See Architecture Reference Manual
Store Byte
(byte)Mem[Rs+offset> = Rt
Store Conditional Word
if LL = 1
mem[Rs+offset> = Rt
Rt = LL
Software Debug Break Point
Trap to SW Debug Handler
Sign-Extend Byte
Rd = (byte)Rs
Sign-Extend Half
Rd = (half)Rs
Store Half
(half)Mem[Rs+offset> = Rt
Shift Left Logical
Rd = Rt << sa
Shift Left Logical Variable
Rd = Rt << Rs[4:0>
Set on Less Than
if (int)Rs < (int)Rt
Rd = 1
else
Rd = 0
Set on Less Than Immediate
if (int)Rs < (int)Immed
Rt = 1
else
Rt = 0
Set on Less Than Immediate Unsigned
if (uns)Rs < (uns)Immed
Rt = 1
else
Rt = 0
Set on Less Than Unsigned
if (uns)Rs < (uns)Immed
Rd = 1
else
Rd = 0
Shift Right Arithmetic
Rd = (int)Rt >> sa
Shift Right Arithmetic Variable
Rd = (int)Rt >> Rs[4:0>
Shift Right Logical
Rd = (uns)Rt >> sa
Shift Right Logical Variable
Rd = (uns)Rt >> Rs[4:0>
Superscalar Inhibit No Operation
NOP
Integer Subtract
Rt = (int)Rs - (int)Rd
Unsigned Subtract
Rt = (uns)Rs - (uns)Rd
Store Word
Mem[Rs+offset> = Rt
Store Word Left
See Architecture Reference Manual
DS61143E-page 50
Preliminary
© 2008 Microchip Technology Inc.