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PIC32MX440F256H-80I Datasheet, PDF (588/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers
PIC32MX3XX/4XX
28.2.5 BOUNDARY SCAN TESTING (BST)
Boundary Scan Testing (BST) is the method of control-
ling and observing the boundary pins of the JTAG com-
pliant device, like those of the PIC32MX3XX/4XX,
utilizing software control. BST can be used to test con-
nectivity between devices by daisy-chaining JTAG
compliant devices to form a single scan chain. Several
scan chains can exist on a PCB to form multiple scan
chains. These multiple scan chains can then be driven
simultaneously to test many components in parallel.
Scan chains can contain both JTAG compliant devices
and non-JTAG compliant devices.
A key advantage of BST is that it can be implemented
without physical test probes; all that is needed is a 4-
wire interface and an appropriate test platform. Since
JTAG boundary scan has been available for many
years, many software tools exist for testing scan chains
without the need for extensive physical probing. The
main drawback to BST is that it can only evaluate digital
signals and circuit continuity; it cannot measure input or
output voltage levels or currents.
28.2.5.1 Related JTAG Files
To implement BST, all JTAG test tools will require a
Boundary Scan Description Language (BSDL) file.
BSDL is a subset of VHDL (VHSIC Hardware Descrip-
tion Language), and is described as part of IEEE.
1149.1. The device-specific BSDL file describes how
the standard is implemented on a particular device and
how it operates.
The BSDL file for a particular device includes the
following:
• The pinout and package configuration for the
particular device
• The physical location of the TAP pins
• The Device ID register and the device ID
• The length of the Instruction Register
• The supported BST instructions and their binary
codes
• The length and structure of the Boundary Scan
register
• The boundary scan cell definition
Device-specific BSDL files are available at Microchip’s
web site, www.microchip.com.
The name for each BSDL file is the device name and
silicon revision–for example, PIC32MX3XX/4XX
320F128L_A2.BSD is the BSDL file for
PIC32MX3XX/4XX 320F128L, silicon revision A2.
28.3 Interrupts
Programming and debugging operations are not
performed during code execution and are therefore not
affected by interrupts. Trace operations will report the
change in code execution when a interrupt occurs but
the trace controller is not affected by interrupts.
28.4 I/O Pins
In order to interface the numerous programming and
debugging option available and still provide peripheral
access to the pins, the pins are multiplexed with periph-
erals. Table describes the function of the programming
and debug related pins.
TABLE 28-8:
Pin Name
PROGRAMMING AND DEBUGGING PIN FUNCTIONS
Function
Boundary Program Debug
Scan Mode Mode Mode
Trace
Mode
Description
Comments
MCLR
PGC1/EMUC1 General
Purpose I/O
PGD1/EMUD1 or Peripheral
PGC2/EMUC2 General
Purpose I/O
PGD2/EMUD2 or Peripheral
MCLR
PGC1
—
PGD1
PGC2
PGD2
—
EMUC1
—
EMUD1
—
EMUC1
—
EMUD1
Master Clear
ICSP™ Clock
Used to enter ICSP™
mode and to override
JTAGEN (DDPCON<3>)
ICSP™ Data
Alternate ICSP™ Clock
Selected by ICESEL
(DEVCFG0<3>) and
DEBUG Configuration
bits (DEVCFG0<1:0>)
Alternate ICSP™ Data
DS61143E-page 586
Preliminary
© 2008 Microchip Technology Inc.