PIC32MX440F256H-80I Datasheet, PDF (455/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

FIGURE 20-3:
DEMULTIPLEXED
ADDRESSING
PIC32MX3XX/4XX
PMA<13:0>
PMD<7:0>
PMD<15:8> ₍₁₎
PMA14/PMCS1
PMA15/PMCS2
PMRD
ADRMUX<1:0> = 00
PMWR
Address Bus
Data Bus
Control Lines
Note 1: PMA15 is not available if PMCS2 is enabled.
PMA14 is not available if PMCS1 is enabled.
20.2.13 PARTIAL MULTIPLEXED MODE
In Partial Multiplexed mode, the lower eight address
bits are multiplexed with data pins PMD<7:0>. The
upper eight address bits are unaffected and are
presented on PMA<15:8>. Note, PMA15 is not
available if PMCS2 is enabled and PMA14 is not
available if PMCS1 is enabled. The PMA<0> pin is
used as an Address Latch, and presents the Address
Latch Low enable strobe (PMALL). PMA<7:1> are
available as general purpose I/O pins. Partial
Multiplexed mode is selected by configuring bits
ADRMUX<1:0> = 00.
FIGURE 20-4:
PARTIAL MULTIPLEXED
ADDRESSING
PIC32MX3XX/4XX
PMA<13:8>
PMD<7:0>
PMD<15:8> ₍₁₎
PMA14/PMCS1
PMA15/PMCS2
PMA0 / PMALL
PMRD
ADRMUX<1:0> = 01
PMWR
Address Bus
Multiplexed Address/Data Bus
Data Bus
Control Lines
Note 1: PMA15 is not available if PMCS2 is enabled.
PMA14 is not available if PMCS1 is enabled.
PIC32MX3XX/4XX
20.2.14 FULL MULTIPLEXED MODE (8-BIT
DATA PINS)
In 8-bit Full Multiplexed mode, the entire 16 bits of the
address are multiplexed with the data pins on
PMD<7:0>. The PMA<0> and PMA<1> pins are used
to present Address Latch Low enable (PMALL) and
Address Latch High enable PMALH strobes,
respectively. Pins PMA<13:2> are not used as address
pins and can be used as general purpose I/O pins. In
the event address bits PMA15 or PMA14 are
configured as Chip Selects, the corresponding address
bits PMADDR<15> and PMADDR<14> are
automatically forced = 0. Full 8-bit Multiplexed mode is
selected by configuring bits ADRMUX<1:0>
(PMCON<12:11>) = 10.
FIGURE 20-5:
FULL MULTIPLEXED
ADDRESSING
(8-BIT BUS)
PIC32MX3XX/4XX
PMD<7:0>
(1)
PMA14/PMCS1
PMA15/PMCS2
PMA0 / PMALL
PMA1 / PMALH
PMRD
ADRMUX<1:0> = 10
PMWR
Fully Multiplexed Address/Data Bus
Control Lines
Note 1: PMA15 is not available if PMCS2 is enabled.
PMA14 is not available if PMCS1 is enabled.
20.2.15 FULL MULTIPLEXED MODE (16-BIT
DATA PINS)
In Full 16-bit Multiplexed mode, the entire 16 bits of the
address are multiplexed with the data pins on
PMD<15:0>. Pins PMA<0> and PMA<1> provide
Address Latch Low enable PMALL and Address Latch
High enable PMALH strobes, respectively, and at the
same time. Pins PMA<13:2> are not used as address
pins and can be used as general purpose I/O pins. In
the event address bits PMA15 or PMA14 are config-
ured as Chip Selects, the corresponding address bits
PMADDR<15> and PMADDR<14> are automatically
forced = 0. Full 16-bit Multiplexed mode is selected by
configuring bits:
ADRMUX<1:0>(PMCON<12:11>) = 11
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 453