PIC32MX440F256H-80I Datasheet, PDF (293/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

6. The module issues, or waits for, a handshake
PID (ACK, NAK, STALL), unless the endpoint is
setup as an isochronous endpoint (EPHSHK bit
UEPMx<0> is cleared).
7. The module updates the BD, and writes the
UOWN bit to ‘0’ (SW owned).
8. The module updates the U1STAT register, and
sets the TRNIF interrupt.
9. Software reads the U1STAT register, and deter-
mines the endpoint and direction for the transac-
tion.
10. Software reads the appropriate BD, completes
all necessary processing, and clears the TRNIF
interrupt.
Note:
For transmitted (IN) transactions (host
reading data from the device), the read
data must be ready when the Host begins
USB signaling. Otherwise, the USB mod-
ule will send a NAK handshake if UOWN is
‘0’.
11.8.1
RECEIVING AN IN TOKEN IN
DEVICE MODE
Perform the following steps to receive an IN token in
Device mode:
1. Attach to a USB host and enumerate as
described in Chapter 9 of the USB 2.0
specification.
2. Populate the data buffer with the data to send to
the host.
3. In the appropriate (EVEN or ODD) transmit buf-
fer descriptor for the desired endpoint:
a) Set up the control bit field (BDnSTAT) with
the correct data toggle (DATA0/1) value and
the byte count of the data buffer.
b) Set up the address bit field (BDnADR) with
the starting address of the data buffer.
c) Set the UOWN bit field to ‘1’.
4. When the USB module receives an IN token, it
automatically transmits the data in the buffer.
Upon completion, the module updates the Sta-
tus bit field (BDnSTAT), clears the UOWN bit
and sets the transfer complete interrupt
(U1IR<TRNIF>).
PIC32MX3XX/4XX
11.8.2
RECEIVING AN OUT TOKEN IN
DEVICE MODE
Perform the following steps to receive an OUT token in
Device mode:
1. Attach to a USB host and enumerate as
described in Chapter 9 of the USB 2.0
specification.
2. Create a data buffer with the amount of data you
are expecting from the host.
3. In the appropriate (EVEN or ODD) transmit buf-
fer descriptor for the desired endpoint:
a) Set up the Status bit field (BDnSTAT) with
the correct data toggle (DATA0/1) value and
the byte count of the data buffer.
b) Set up the address bit field (BDnADR) with
the starting address of the data buffer.
c) Set the UOWN bit of the Status bit field to
‘1’.
4. When the USB module receives an OUT token,
it will automatically receive the data the host
sent into the buffer. Upon completion, the mod-
ule updates the Status bit field (BDnSTAT),
clears the UOWN bit and sets the transfer
complete interrupt (U1IR<TRNIF>).
11.9 Host Mode Operation
In Host mode, only Endpoint 0 is used (all other end-
points should be disabled). Since the host initiates all
transfers, the BD does not require immediate initializa-
tion. However, the BDs must be configured before a
transfer is initiated – which is done by writing to the
U1TOK register.
The following sections describe how to perform com-
mon Host mode tasks. In Host mode, USB transfers
are invoked explicitly by the host software. The host
software is responsible for initiating the setup, data,
and status stages of all control transfers. The acknowl-
edge (ACK or NAK) is generated automatically by the
hardware, based on the CRC. Host software is also
responsible for scheduling packets so that they do not
violate USB protocol. All transfers are performed using
the Endpoint 0 Control register (U1EP0) and BDs.
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 291