PIC32MX440F256H-80I Datasheet, PDF (259/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
REGISTER 11-6: U1IR: USB INTERRUPT REGISTER (CONTINUED)
bit 2
SOFIF: SOF Token Interrupt bit
Write a ‘1’ to this bit to clear the interrupt.
1 = SOF token received by the peripheral or the SOF threshold reached by the host
0 = SOF token was not received nor threshold reached
bit 1
UERRIF: USB Error Condition Interrupt bit⁽⁴⁾
Write a ‘1’ to this bit to clear the interrupt.
1 = Unmasked error condition has occurred
0 = Unmasked error condition has not occurred
bit 0
URSTIF: USB Reset Interrupt bit (Device mode)
1 = Valid USB Reset has occurred
0 = No USB Reset has occurred
DETACHIF: USB Detach Interrupt bit (Host mode)
1 = Peripheral detachment was detected by the USB module
0 = Peripheral detachment was not detected
Note 1:
2:
3:
4:
5:
6:
This bit is valid only if the HOSTEN bit is set (see Register 11-11), there is no activity on the USB for
2.5 µs, and the current bus state is not SE0.
When not in Suspend mode, this interrupt should be disabled.
Clearing this bit will cause the STAT FIFO to advance.
Only error conditions enabled through the U1EIE register will set this bit.
Device mode.
Host mode.
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 257