PIC32MX440F256H-80I Datasheet, PDF (338/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
13.5 Timer Interrupts
Timer1 can generate an interrupt on a period match
event or a gate event, caused by the falling edge of the
external gate signal.
Timer1 sets the interrupt flag bit, T1IF (IFS0<4>),
whenever a Timer1 event is generated. Refer to a spe-
cific Timer mode for details regarding event conditions.
When a Timer1 event is generated, the interrupt flag bit
is set within 1 PBCLK + 2 SYSCLK cycles. If Timer1
Interrupt Enable bit is set, T1IE (IEC0<4>) = 1, an
interrupt is generated.
The Timer1 module is enabled as a source of interrupts
through its respective interrupt enable bit, T1IE
(IEC0<4>). The Timer1 Interrupt Flag, T1IF (IFS0<4>),
must be cleared in software.
The interrupt priority level bits and interrupt subpriority
level bits must be also be configured:
• T1IP<2:0> (IPC1<4:2>)
• T1IS<1:0> (IPC1<1:0)
Setting Timer1 interrupt priority level = 0 effectively
disables the timer’s ability to generate an interrupt.
In addition to enabling the Timer1 interrupt, an Interrupt
Service Routine, ISR, is generally required. Below is a
partial code example of an ISR.
Note:
It is the user’s responsibility to clear the
corresponding interrupt flag bit before
returning from an ISR.
EXAMPLE 13-5:
T1CON = 0x0
TIMER INTERRUPT AND PRIORITIES
// Stop the Timer and Reset Control register
// Set prescaler at 1:1, internal clock source
TMR1 = 0x0;
PR1 = 0xFFFF;
// Clear timer register
// Load period register
IPC1SET = 0x000C;
IPC1SET = 0x0001;
// Set priority level=3
// Set subpriority level=1
// Could have also done this in single
// operation by assigning IPC1SET = 0x000D
IFS0CLR = 0x0010;
IEC0SET = 0x0010;
T1CONSET = 0x8000;
// Clear Timer interrupt status flag
// Enable Timer interrupts
// Start Timer
EXAMPLE 13-6: TIMER ISR
void __ISR(_TIMER_1_VECTOR, ipl3) T1_Interrupt_ISR(void)
{
... perform application specific operations in response to the interrupt
IFS0CLR = 0x0010;
}
// Be sure to clear the Timer 1 interrupt status
Note: The timer ISR code example shows MPLAB^® C32 C Compiler specific syntax. Refer to your compiler
manual regarding support for ISRs.
DS61143E-page 336
Preliminary
© 2008 Microchip Technology Inc.