PIC32MX440F256H-80I Datasheet, PDF (439/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
19.12 UART Interrupts
The UART device has the ability to generate interrupts,
reflecting the events that occur during data communi-
cation. The following types of interrupts can be
generated:
• Receiver-data-available interrupts, signalled by
U1RXIF (IFS0<27>), U2RXIF (IFS1<9>). This
event occurs when there is new data assembled
in the UxRXBUF receive buffer.
• Transmitter-buffer-empty interrupts, signalled by
U1TXIF (IFS0<28>), U2TXIF (IFS1<10>). This
event occurs when there is space available in the
UxTXBUF transmit buffer and new data can be
written.
• Receiver-buffer-overflow interrupt, signalled by
U1EIF (IFS0<26>), U2EIF (IFS1<8>). This event
occurs when there is an overflow condition for the
UxRXBUF receive buffer, i.e., new receive data
assembled but the previous one not read.
A UART device is enabled as a source of interrupts via
the respective UART interrupt enable bits:
• U1RXIE (IEC0<27>) and U2RXIE (IEC1<9>)
• U1TXIE (IEC0<28>) and U2TXIE (IEC1<10>)
• U1EIE (IEC0<26>) and U2EIE (IEC1<8>)
The interrupt priority level bits and interrupt subpriority
level bits must be also be configured:
• U1IP (IPC6<4:2>), U1IS (IPC6<1:0>)
• U2IP (IPC8<4:2>), U2IS (IPC8<1:0>).
In addition to enabling the UART interrupts, an Interrupt
Service Routine (ISR) is required. Below is a partial
code example of an ISR.
Note:
It is the user’s responsibility to clear the
corresponding interrupt flag bit before
returning from an ISR.
EXAMPLE 19-4: UART INITIALIZATION WITH INTERRUPTS ENABLE
/*
The following code example illustrates a UART1 interrupt configuration.
When the UART1 interrupt is generated, the cpu will jump to the vector assigned to UART1
interrupt.
*/
IEC0CLR=0x1c000000;
IFS0CLR=0x1c000000;
IPC6CLR=0x0000001f;
IPC6SET=0x000d;
IEC0SET=0x1c000000;
// disable all UART1 interrupts
// clear any existing event
// clear the priority
// Set IPL=3, subpriority 1
// Enable Rx, Tx and Error interrupts
U1BRG = #BaudRate;
U1MODESET= 0x8000;
U1STASET= 0x1400;
// Set Uart baud rate.
// Enable Uart for 8-bit Data, no Parity, and 1 Stop bit
// Enable Transmitter and Receiver
EXAMPLE 19-5: UART1 ISR
/*
The following code example demonstrates a simple interrupt service routine for UART1
interrupts. The user’s code at this vector should perform any application specific
operations and must clear the UART1 interrupt flags before exiting.
*/
void__ISR(_UART_1_VECTOR, ipl4)Uart1_IntHandler(void)
{
... perform application specific operations in response to the interrupt
IFS0CLR = 0x1c000000;
data = U1RXREG;
}
// Be sure to clear the UART1 interrupt flags
// before exiting the service routine.
// read data from the UART hardware buffer
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 437