PIC32MX440F256H-80I Datasheet, PDF (74/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
FIGURE 4-3:
EXTERNAL CLOCK INPUT
OPERATION WITH
CLOCK-OUT (EC, ECPLL
MODE)
Clock from
Ext. System
PBCLK
OSCI
PIC32MX3XX/4XX
OSCO (Clock Out)
FIGURE 4-4:
EXTERNAL CLOCK INPUT
OPERATION WITH NO
CLOCK-OUT (EC OR
ECPLL MODE)
Clock from
Ext. System
I/O
OSCI
PIC32MX3XX/4XX
I/O (OSCO)
4.2.1.3 Oscillator Start-up Timer
In order to ensure that a crystal oscillator (or ceramic
resonator) has started and stabilized, an Oscillator
Start-up Timer (OST) is provided. The OST is a simple
10-bit counter that counts 1024 TOSC cycles before
releasing the oscillator clock to the rest of the system.
This time-out period is designated as TOST. The ampli-
tude of the oscillator signal must reach the VIL and VIH
thresholds for the oscillator pins before the OST can
begin to count cycles.
The TOST interval is required every time the oscillator
has to restart (i.e., on POR, BOR and wake-up from
Sleep mode). The Oscillator Start-up Timer is applied to
the XT and HS modes for the primary oscillator, as well
as the secondary oscillator, see Section 4.2.1.5 “Sec-
ondary Oscillator (SOSC)”.
4.2.1.2
Primary Oscillator (POSC)
Configuration
To configure the POSC, the following steps should be
performed:
1. Select POSC as the default oscillator in the
device Configuration register, DEVCFG1, by
setting FNOSC<2:0> = 010, without PLL; or
FNOSC<2:0> = 011, with PLL.
2. Select the desired mode (HS, XT, or EC), using
POSCMD<1:0> in the DEVCFG1 register.
3. If the PLL is to be used:
a) Select the appropriate Configuration bits for
the PLL input divider to scale the input
frequency to be between 4 MHz and 5 MHz
using FPLLIDIV<2:0> in the DEVCFG2
register.
b) Select the desired PLL multiplier ratio using
FPLLMULT<2:0> in the DEVCFG2 register.
c) At runtime, select the desired PLL output
divider using OSCCON<29:27> in the
PLLODIV register to provide the desired
clock frequency. The default value is set by
the DEVCFG1 register.
DS61143E-page 72
Preliminary
© 2008 Microchip Technology Inc.