|
PIC32MX440F256H-80I Datasheet, PDF (218/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers | |||
|
◁ |
PIC32MX3XX/4XX
REGISTER 10-9:
r-x
â
bit 31
DCHXINT: DMA CHANNEL X INTERRUPT CONTROL REGISTER
r-x
r-x
r-x
r-x
r-x
r-x
â
â
â
â
â
â
r-x
â
bit 24
R/W-0
CHSDIE
bit 23
R/W-0
CHSHIE
R/W-0
CHDDIE
R/W-0
CHDHIE
R/W-0
CHBCIE
R/W-0
CHCCIE
R/W-0
CHTAIE
R/W-0
CHERIE
bit 16
r-x
â
bit 15
r-x
r-x
r-x
r-x
r-x
r-x
r-x
â
â
â
â
â
â
â
bit 8
R/W-0
CHSDIF
bit 7
R/W-0
CHSHIF
R/W-0
CHDDIF
R/W-0
CHDHIF
R/W-0
CHBCIF
R/W-0
CHCCIF
R/W-0
CHTAIF
R/W-0
CHERIF
bit 0
Legend:
R = Readable bit
U = Unimplemented bit
W = Writable bit
P = Programmable bit
-n = Bit Value at POR: (â0â, â1â, x = Unknown)
r = Reserved bit
bit 31-24
bit 23
bit 22
bit 21
bit 20
bit 19
bit 18
bit 17
bit 16
bit 15-8
Reserved: Write â0â; ignore read
CHSDIE: Channel Source Done Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
CHSHIE: Channel Source Half Empty Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
CHDDIE: Channel Destination Done Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
CHDHIE: Channel Destination Half Full Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
CHBCIE: Channel Block Transfer Complete Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
CHCCIE: Channel Cell Transfer Complete Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
CHTAIE: Channel Transfer Abort Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
CHERIE: Channel Address Error Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
Reserved: Write â0â; ignore read
DS61143E-page 216
Preliminary
© 2008 Microchip Technology Inc.
|
▷ |