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PIC32MX440F256H-80I Datasheet, PDF (21/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers
PIC32MX3XX/4XX
TABLE 1-4: PIC32MX3XX/4XX PINOUT DESCRIPTIONS – GENERAL PURPOSE (CONTINUED)
Function
Pin Number
64-pin 100-pin
I/O
Input
Buffer
Description
PMD0
PMD1
60
93
I/O ST/TTL Parallel Master Port Data (Demultiplexed Master mode) or
61
94
I/O ST/TTL Address/Data (Multiplexed Master modes)
PMD2
62
98
I/O ST/TTL
PMD3
63
99
I/O ST/TTL
PMD4
64
100
I/O ST/TTL
PMD5
1
3
I/O ST/TTL
PMD6
2
4
I/O ST/TTL
PMD7
3
5
I/O ST/TTL
PMD8
—
90
I/O ST/TTL
PMD9
—
89
I/O ST/TTL
PMD10
—
88
I/O ST/TTL
PMD11
—
87
I/O ST/TTL
PMD12
—
79
I/O ST/TTL
PMD13
—
80
I/O ST/TTL
PMD14
—
83
I/O ST/TTL
PMD15
—
84
I/O ST/TTL
PMENB
52
81
O
— Parallel Master Port Enable Strobe (Master Mode 1)
PMRD
53
82
O
— Parallel Master Port Read Strobe (Master Mode 2)
PMRD/PMWR
53
82
O
— Parallel Master Port Read/Write Strobe (Master Mode 1)
PMWR
52
81
O
— Parallel Master Port Write Strobe (Master Mode 2)
Legend:
Note:
TTL = TTL input buffer
ANA = Analog level input/output
ST = Schmitt Trigger input buffer
I2C™ = I2C/SMBus input buffer
In some cases, I/O pins are multiplexed with more than one peripheral. In general, the dominant output control of a
multiplexed I/O pin can be determined by the order of the peripheral output names assigned to a pin (read from left to
right). Multiplexed peripheral inputs have no priority.
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 19