PIC32MX440F256H-80I Datasheet, PDF (358/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
TABLE 15-1: INPUT CAPTURE1 REGISTER SUMMARY
Virtual
Address
Name
Bit
Bit
Bit
Bit
Bit
Bit
Bit
31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1
BF80_2000 IC1CON 31:24
23:16
15:8
7:0
BF80_2004 IC1CONCLR 31:0
BF80_2008 IC1CONSET 31:0
BF80_200C IC1CONINV 31:0
BF80_2010 IC1BUF 31:24
23:16
15:8
7:0
—
—
ON
ICTMR
—
—
—
—
—
—
—
—
—
—
—
—
FRZ
SIDL
—
—
—
ICFEDGE
ICI<1:0>
ICOV
ICBNE
ICM<2:0>
Write clears selected bits in IC1CON, read yields an undefined value
Write sets selected bits in IC1CON, read yields an undefined value
Write inverts selected bits in IC1CON, read yields an undefined value
IC1BUF<31:24>
IC1BUF<23:16>
IC1BUF<15:8>
IC1BUF<7:0>
Bit
24/16/8/0
—
—
ICC32
TABLE 15-2: INPUT CAPTURE1 INTERRUPT REGISTER SUMMARY⁽¹⁾
Virtual
Address
Name
Bit
Bit
Bit
Bit
Bit
Bit
Bit
31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1
Bit
24/16/8/0
BF88_1060
IEC0
7:0
INT1IE
OC1IE
IC1IE
T1IE
INT0IE
CS1IE
CS0IE
CTIE
BF88_1030
IFS0
7:0
INT1IF
OC1IF
IC1IF
T1IF
INT0IF
CS1IF
CS0IF
CTIF
BF88_10A0
IPC1
15:8
—
—
—
IC1IP<2:0>
15:8
—
Note 1: This summary table contains partial register definitions that only pertain to the Input Capture1 peripheral. Refer to the “PIC32MX Family
Reference Manual” (DS61132) for a detailed description of these registers.
TABLE 15-3: INPUT CAPTURE2 REGISTER SUMMARY
Virtual
Address
Name
Bit
31/23/15/7
BF80_2200 IC2CON 31:24
23:16
15:8
7:0
BF80_2204 IC2CONCLR 31:0
BF80_2208 IC2CONSET 31:0
BF80_220C IC2CONINV 31:0
BF80_2210 IC2BUF 31:24
23:16
15:8
7:0
—
—
ON
ICTMR
Bit
Bit
Bit
Bit
Bit
Bit
30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1
—
—
—
—
—
—
—
—
—
—
—
—
FRZ
SIDL
—
—
—
ICFEDGE
ICI<1:0>
ICOV
ICBNE
ICM<2:0>
Write clears selected bits in IC2CON, read yields an undefined value
Write sets selected bits in IC2CON, read yields an undefined value
Write inverts selected bits in IC2CON, read yields an undefined value
IC2BUF<31:24>
IC2BUF<23:16>
IC2BUF<15:8>
IC2BUF<7:0>
Bit
24/16/8/0
—
—
ICC32
TABLE 15-4: INPUT CAPTURE2 INTERRUPT REGISTER SUMMARY⁽¹⁾
Virtual
Address
Name
Bit
Bit
Bit
Bit
Bit
Bit
Bit
31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1
Bit
24/16/8/0
BF88_1060
IEC0
15:8
INT3IE
OC3IE
IC3IE
T3IE
INT2IE
OC2IE
IC2IE
T2IE
BF88_1030
IFS0
15:8
INT3IF
OC3IF
IC3IF
T3IF
INT2IF
OC2IF
IC2IF
T2IF
BF88_10B0
IPC2
15:8
—
—
—
IC2IP<2:0>
IC2IS<1:0>
Note 1: This summary table contains partial register definitions that only pertain to the Input Capture5 peripheral. Refer to the “PIC32MX Family
Reference Manual” (DS61132) for a detailed description of these registers.
DS61143E-page 356
Preliminary
© 2008 Microchip Technology Inc.