PIC32MX440F256H-80I Datasheet, PDF (378/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
16.2 Setup for Single Output Change
There are three modes of operation that change the
state of the output pin; these modes can be referred to
as drive high, drive low and toggle. The configuration
for these modes is identical, the mode is selected by
the OCM bits. For this example, Tx will represent
Timer2.
Drive High: When the OCM control bits
(OCxCON<2:0>) are set to ‘001’, the selected output
compare channel initializes the OCx pin to the low state
and drives the output pin high when a compare event
occurs.
Drive Low: When the OCM control bits
(OCxCON<2:0>) are set to ‘010’, the selected output
compare channel initializes the OCx pin to the high
state and drives the output pin low when a compare
event occurs.
Toggle: When the OCM control bits (OCxCON<2:0>)
are set to ‘011’, the selected output compare channel
OCx pin is not initialized. The OCx pin is driven to the
opposite state when a compare event occurs.
To generate a output change signal, the following steps
are required (these steps assume the timer source is
initially turned off, but this is not a requirement for the
module operation):
1. Determine the timer clock cycle time. Take into
account the frequency of the external clock to
the timer source (if one is used) and the timer
prescaler settings.
2. Calculate time to the rising edge of the output
pulse relative to the timer start value (0000h).
3. Determine if the output compare module will be
used in 16 or 32-bit mode based on the previous
calculations.
4. Configure the timer to be used as the time base
for 16 or 32-bit mode by writing to the T32 bit
(TxCON<T32>).
5. Configure the output compare channel for 16 or
32-bit operation by writing to the OC32 bit
(OCxCON<5>).
6. Write the value computed in step 2 above into
the Compare register, OCxR.
7. Set Timer Period register, PRx, to the value equal
to or greater than the value in OCxRS, the
Secondary Compare register.
8. Set the OCM bits to the desired mode of operation
and the OCTSEL (OCxCON<3>) bit to the desired
timer source. The OCx pin state will now be driven
low.
9. Set the ON (TxCON<15>) bit to ‘1’ which enables
the compare time base to count.
10. Upon the first match between TMRx and OCxR,
the OCx pin will be driven high.
11. When the incrementing timer, TMRx, matches the
Secondary Compare register, OCxRS, the
second and trailing edge (high-to-low) of the pulse
is driven onto the OCx pin. No additional pulses
are driven onto the OCx pin and it remains at low.
As a result of the second compare match event,
the OCxIF interrupt flag bit is set, which will
result in an interrupt if it is enabled, by setting
the OCxIE bit. For further information on
peripheral interrupts, refer to Section 8.0
“Interrupts”.
12. To initiate another single pulse output, change the
Timer and Compare register settings, if needed,
and then issue a write to set the OCM bits to the
desired mode of operation. Disabling and re-
enabling of the timer and clearing the Timer
register are not required, but may be
advantageous for defining a pulse from a known
event time boundary.
16.3 Setup for Single Output Pulse
Generation
When the OCM control bits (OCxCON<2:0>) are set to
‘100’, the selected output compare channel initializes
the OCx pin to the low state and generates a single out-
put pulse.
To generate a single output pulse, the following steps
are required (these steps assume the timer source is
initially turned off, but this is not a requirement for the
module operation): For this example Tx will represent
Timer2.
1. Determine the timer clock cycle time. Take into
account the frequency of the external clock to
the timer source (if one is used) and the timer
prescaler settings.
2. Calculate time to the rising edge of the output
pulse relative to the timer start value (0000h).
3. Calculate the time to the falling edge of the pulse
based on the desired pulse width and the time to
the rising edge of the pulse.
4. Determine if the output compare module will be
used in 16 or 32-bit mode based on the previous
calculations.
5. Configure the timer to be used as the time base
for 16 or 32-bit mode by writing to the T32 bit
(TxCON<T32>).
6. Configure the output compare channel for 16 or
32-bit operation by writing to the OC32 bit
(OCxCON<5>).
7. Write the values computed in steps 2 and 3
above into the Compare register, OCxR, and the
Secondary Compare register, OCxRS,
respectively.
8. Set Timer Period register, PRx, to the value equal
to or greater than the value in the OCxRS, the
Secondary Compare register.
DS61143E-page 376
Preliminary
© 2008 Microchip Technology Inc.