PIC32MX440F256H-80I Datasheet, PDF (622/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
TABLE 30-33: I2Cx BUS DATA TIMING REQUIREMENTS (SLAVE MODE)
AC CHARACTERISTICS
Standard Operating Conditions: 2.3V to 3.6V
(unless otherwise stated)
Operating temperature -40°C ≤ TA ≤ +85°C for Industrial
Param.
No.
Symbol
Characteristics
Min.
Max. Units
Conditions
IS10 TLO:SCL Clock Low Time 100 kHz mode
4.7
—
μs
400 kHz mode
1.3
1 MHz mode⁽¹⁾
0.5
IS11 THI:SCL Clock High Time 100 kHz mode
4.0
—
μs
—
μs
—
μs
400 kHz mode
0.6
—
μs
1 MHz mode⁽¹⁾
0.5
—
μs
IS20
TF:SCL
SDAx and SCLx 100 kHz mode
—
300
Fall Time
400 kHz mode 20 + 0.1 CB 300
1 MHz mode⁽¹⁾
—
100
nsec
nsec
nsec
IS21
TR:SCL
SDAx and SCLx
Rise Time
100 kHz mode
400 kHz mode
1 MHz mode⁽¹⁾
—
20 + 0.1 CB
—
1000
300
300
nsec
nsec
nsec
IS25 TSU:DAT Data Input
100 kHz mode
250
Setup Time
400 kHz mode
100
1 MHz mode⁽¹⁾
100
— nsec
— nsec
— nsec
IS26 THD:DAT Data Input
100 kHz mode
0
— nsec
Hold Time
400 kHz mode
0
0.9 μs
1 MHz mode⁽¹⁾
0
0.3 μs
IS30
TSU:STA Start Condition
Setup Time
100 kHz mode
400 kHz mode
1 MHz mode⁽¹⁾
4700
600
250
—
μs
—
μs
—
μs
IS31
THD:STA Start Condition
Hold Time
100 kHz mode
400 kHz mode
1 MHz mode⁽¹⁾
4000
600
250
—
μs
—
μs
—
μs
IS33
TSU:STO Stop Condition
Setup Time
100 kHz mode
400 kHz mode
1 MHz mode⁽¹⁾
4000
600
600
—
μs
—
μs
—
μs
IS34
THD:STO Stop Condition
Hold Time
100 kHz mode
400 kHz mode
1 MHz mode⁽¹⁾
4000
600
250
— nsec
— nsec
nsec
IS40
TAA:SCL
Output Valid From 100 kHz mode
Clock
400 kHz mode
1 MHz mode⁽¹⁾
0
3500 nsec
0
1000 nsec
0
350 nsec
IS45 TBF:SDA Bus Free Time 100 kHz mode
4.7
—
μs
400 kHz mode
1.3
1 MHz mode⁽¹⁾
0.5
—
μs
—
μs
IS50 CB
Bus Capacitive Loading
—
400 pF
Note 1: Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only).
PBCLK must operate at a
minimum of 800 KHz
PBCLK must operate at a
minimum of 3.2 MHz
PBCLK must operate at a
minimum of 800 KHz.
PBCLK must operate at a
minimum of 3.2 MHz
CB is specified to be from
10 to 400 pF
CB is specified to be from
10 to 400 pF
Only relevant for Repeated
Start condition
After this period, the first
clock pulse is generated
Time the bus must be free
before a new transmission
can start
DS61143E-page 620
Preliminary
© 2008 Microchip Technology Inc.