PIC32MX440F256H-80I Datasheet, PDF (184/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
REGISTER 9-2: CHEACC: CACHE ACCESS
R/W-0
r-x
r-x
r-x
r-x
r-x
r-x
r-x
CHEWEN
—
—
—
—
—
—
—
bit 31
bit 24
r-x
—
bit 23
r-x
r-x
r-x
r-x
r-x
r-x
r-x
—
—
—
—
—
—
—
bit 16
r-x
—
bit 15
r-x
r-x
r-x
r-x
r-x
r-x
r-x
—
—
—
—
—
—
—
bit 8
r-x
—
bit 7
r-x
r-x
r-x
R/W-0
R/W-0
R/W-0
R/W-0
—
—
—
CHEIDX<3:0>
bit 0
Legend:
R = Readable bit
U = Unimplemented bit
W = Writable bit
P = Programmable bit
-n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
r = Reserved bit
bit 31
bit 30-4
bit 3-0
CHEWEN: Cache Access Enable bits for registers CHETAG, CHEMSK, CHEW0, CHEW1, CHEW2,
and CHEW3
1 = The cache line selected by CHEIDX is writable
0 = The cache line selected by CHEIDX is not writable
Reserved: Write ‘0’; ignore read
CHEIDX<3:0>: Cache Line Index bits
The value selects the cache line for reading or writing.
DS61143E-page 182
Preliminary
© 2008 Microchip Technology Inc.