PIC32MX440F256H-80I Datasheet, PDF (173/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
8.5 Interrupt Priorities
8.5.1 INTERRUPT GROUP PRIORITY
The user is able to assign a group priority to each of the
interrupt vectors. The groups’ priority level bits are
located in the IPCx register. Each IPCx register con-
tains group priority bits for four interrupt vectors. The
user-selectable priority levels range from 1 (the lowest
priority) to 7 (the highest). If an interrupt priority is set to
zero, the interrupt vector is disabled for both interrupt
and wake-up purposes. Interrupt vectors with a higher
priority level preempt lower priority interrupts. The user
must move the Requested Interrupt Priority bit of the
Cause register, RIPLx (Cause<15:10>), into the Status
register’s Interrupt Priority bits, IPLx (Status<15:10>),
before re-enabling interrupts. (The Cause and Status
registers are located in the CPU; refer to Section 2.0
"PIC32MX MCU" of this manual for more information.)
This action will disable all lower priority interrupts until
the completion of the Interrupt Service Routine.
Note:
The Interrupt Service Routine (ISR) must
clear the associated interrupt flag in the
IFSx register before lowering the interrupt
priority level to avoid recursive interrupts.
EXAMPLE 8-3: SETTING GROUP PRIORITY LEVEL
/*
The following code example will set the priority to level 2. Multi-Vector initialization
must be performed (See Example 8-2)
*/
IPC0CLR = 0x0000001C;
// clear the priority level
IPC0SET = 0x00000008;
// set priority level to 2
8.5.2 INTERRUPT SUBPRIORITY
The user can assign a subpriority level within each
group priority. The subpriority will not cause preemption
of an interrupt in the same priority; rather, if two inter-
rupts with the same priority are pending, the interrupt
with the highest subpriority will be handled first. The
subpriority bits are located in the IPCx register. Each
IPCx register contains subpriority bits for four of the
interrupt vectors. These bits define the subpriority
within the priority level of the vector. The user-
selectable subpriority levels range from 0 (the lowest
subpriority) to 3 (the highest).
EXAMPLE 8-4: SETTING SUBPRIORITY LEVEL
/*
The following code example will set the subpriority to level 2.
must be performed (See Example 8-2)
*/
Multi-Vector initialization
IPC0CLR = 0x00000003;
IPC0SET = 0x00000002;
// clear the subpriority level
// set the subpriority to 2
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 171