PIC32MX440F256H-80I Datasheet, PDF (121/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

7.2 RTSP Operation
RTSP allows the user code to modify Flash program
memory contents. The device Flash memory is divided
into two logical Flash partitions: the Program Flash
Memory (PFM), and the Boot Flash Memory (BFM).
The last page in Boot Flash Memory contains the
DEBUG Page, which is reserved for use by the
debugger tool while debugging.
The program Flash array for the PIC32MX3XX/4XX
device is built up of a series of rows. A row contains 128
32-bit instruction words or 512 bytes. A group of 8 rows
compose a page; which, therefore, contains 8 × 512 =
4096 bytes or 1024 instruction words. A page of Flash
is the smallest unit of memory that can be erased at a
single time. The program Flash array can be pro-
grammed in one of two ways:
• Row programming, with 128 instruction words at a
time.
• Word programming, with 1 instruction word at a
time.
The CPU stalls (waits) until the programming opera-
tion is finished. The CPU will not execute any instruc-
tion, or respond to interrupts, during this time. If any
interrupts occur during the programming cycle, they
remain pending until the cycle completes.
Note:
A minimum VDD requirement for Flash
erase and write operations is required.
Refer to Section 30.1 “DC Characteris-
tics” for details.
PIC32MX3XX/4XX
7.3 Control Registers
There are two SFRs used to erase and write the PFM:
NVMCON and NVMKEY.
The NVMCON register (Register 7-1) controls which
blocks are to be erased, which memory block is to be
programmed and the start of the programming cycle.
NVMKEY is a write-only register that is used for write-
protection. To start a programming or erase sequence,
the user must consecutively write 0xAA996655 and
0x556699AA to the NVMKEY register. Interrupts should
be disabled. Refer to Section 7.4 “Programming
Operations” for further details.
7.4 Programming Operations
A complete programming sequence is necessary for
programming or erasing the internal Flash in RTSP
mode. A programming operation is nominally 5 ms in
duration and the processor stalls (WAITS) until the
operation is finished. Setting the NVMWR bit (NVM-
CON<15>) starts the operation, and the NVMWR bit is
automatically cleared when the operation is finished.
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 119