PIC32MX440F256H-80I Datasheet, PDF (266/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
REGISTER 11-10: U1STAT: USB STATUS FIFO REGISTER
r-x
r-x
r-x
r-x
r-x
r-x
r-x
r-x
—
—
—
—
—
—
—
—
bit 31
bit 24
r-x
r-x
r-x
r-x
r-x
r-x
r-x
r-x
—
—
—
—
—
—
—
—
bit 23
bit 16
r-x
r-x
r-x
r-x
r-x
r-x
r-x
r-x
—
—
—
—
—
—
—
—
bit 15
bit 8
R-x
R-x
R-x
R-x
R-x
R-x
r-x
ENDPT<3:0>
DIR
PPBI
—
bit 7
r-x
—
bit 0
Legend:
R = Readable bit
U = Unimplemented bit
W = Writable bit
P = Programmable bit
-n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
r = Reserved bit
bit 31-8
Reserved: Write ‘0’; ignore read
bit 7-4
ENDPT<3:0>: Encoded Number of Last Endpoint Activity bits
(Represents the number of the BDT, updated by the last USB transfer.)
1111 = Endpoint 15
1110 = Endpoint 14
....
0001 = Endpoint 1
0000 = Endpoint 0
bit 3
DIR: Last BD Direction Indicator bit
1 = Last transaction was a transmit transfer (TX)
0 = Last transaction was a receive transfer (RX)
bit 2
PPBI: Ping-Pong BD Pointer Indicator bit
1 = The last transaction was to the ODD BD bank
0 = The last transaction was to the EVEN BD bank
bit 1-0
Reserved: Write ‘0’; ignore read
Note: The U1STAT register is a window into a 4-byte FIFO maintained by the USB module. U1STAT value is only
valid when U1IR<TRNIF> is active. Clearing the U1IR<TRNIF> bit advances the FIFO. Data in register is
invalid when U1IR<TRNIF> = 0.
DS61143E-page 264
Preliminary
© 2008 Microchip Technology Inc.