PIC32MX440F256H-80I Datasheet, PDF (335/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

13.3.3 SYNCHRONOUS EXTERNAL TIMER
In this mode, the timer clock source is an external clock
source or pulse applied to the T1CK pin, TCS
(T1CON<1>) = 1. To provide synchronization, Timer1
synchronization bit TSYNC (T1CON<2>) must be set
(= 1). The 16-bit TMR1 Count register increments on
every synchronized rising edge of an external clock
when the timer clock prescale <TCKPS> is 1:1.
Timer1 generates a timer match event after the TMR1
Count register matches the PR1 Period register value
(mid-clock cycle on the falling edge), then resets to
0x0000 on the next synchronized external clock cycle.
The timer continues to increment and repeat the period
match until the timer is disabled. For further details
regarding timer events and interrupts, see
Section 13.5 “Timer Interrupts”.
For clock prescale = N (other than 1:1), the timer oper-
ates at a clock rate = (external clock/N), therefore, the
TMRx Count register increments on every Nth external
synchronized clock cycle. For further details regarding
timer prescaler, refer to Section 13.4.2 “Timer Clock
Prescaler”.
13.3.3.1 Considerations
• When using an external clock source, regardless
of the Timer1 prescale value, 2-3 external clock
cycles are required, after the ON bit = 1, before
the TMR1 register begins incrementing.
• Timer1 will not operate from a synchronized exter-
nal clock source while the CPU is in SLEEP
mode, since the synchronizing PB clock is
disabled during Sleep mode.
The following steps should be performed to properly
configure the Timer1 peripheral for Synchronous Coun-
ter mode operation.
1. Clear control bit, ON (T1CON<15>) = 0, to
disable Timer1.
2. Select the desired timer prescaler using bits,
TCKPS<1:0> (T1CON<5:4).
3. Set control bit, TCS (T1CON<1>) = 1, to select
an external clock source.
4. Set control bit, TSYNC (T1CON<2>) = 1, to
enable synchronization.
5. Clear Timer register TMR1.
6. Load Period register PR1 with desired
16-bit match value.
7. If timer interrupts are used, refer to Section 13.5
“Timer Interrupts” for interrupt configuration
steps.
8. Set control bit, ON (T1CON<15>) = 1, to enable
Timer1.
PIC32MX3XX/4XX
EXAMPLE 13-2:
T1CON = 0x0;
T1CON = 0x0036
SYNCHRONOUS
EXTERNAL TIMER
INITIALIZATION
// Stop Timer and reset
// Set prescaler=1:256,
// external clock,
// synchronous mode
TMR1 = 0x0;
PR1 = 0x3FFF;
// Clear timer register
// Load period register
T1CONSET = 0x8000; // Start Timer
13.3.4 ASYNCHRONOUS EXTERNAL
TIMER
In this mode, the timer clock source is an external clock
source or pulse applied to the T1CK pin, TCS
(T1CON<1>) = 1. Clock synchronization is not
required, therefore, the Timer1 clock synchronization
bit should be cleared, TSYNC (T1CON<2>) = 0. The
16-bit TMR1 Count register increments on every rising
edge of an external clock when the timer clock prescale
<TCKPS> is 1:1.
Timer1 generates a timer match event after the TMR1
Count register matches the PR1 register value (mid-
clock cycle on the falling edge), then resets to 0x0000
on the next external clock cycle. The timer continues to
increment and repeat the period match until the timer is
disabled. For further details regarding timer events and
interrupts, see Section 13.5 “Timer Interrupts”.
For clock prescale = N (other than 1:1), the timer oper-
ates at a clock rate = (external clock/N), therefore, the
TMR1 Count register increments on every Nth exter-
nal clock cycle. For further details regarding the timer
prescaler, refer to Section 13.4.2 “Timer Clock
Prescaler”.
13.3.4.1 Considerations
• Regardless of the Timer1 prescale setting, 2-3
external clocks are required after the ON bit = 1,
before the TMR1 register begins incrementing.
• Timer1 can operate while the CPU is in Sleep
mode.
• The Timer1 interrupt can be used to wake the
CPU from Sleep mode.
• Typical use is with the Secondary Low-Power
Oscillator, SOSC and RTCC Real-Time Clock
Calendar peripheral.
Note:
The SOSC oscillator may be used by the
CPU as a low-power clock source. Timer 1
does not have exclusive usage to this
oscillator. Refer to the “PIC32MX Family
Reference Manual” (DS61132) regarding
the operation of the Secondary Low-
Power Oscillator.
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 333