PIC32MX440F256H-80I Datasheet, PDF (332/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
REGISTER 13-1: T1CON: TIMER1 CONTROL REGISTER
r-x
r-x
r-x
r-x
r-x
r-x
r-x
r-x
—
—
—
—
—
—
—
—
bit 31
bit 24
r-x
—
bit 23
r-x
r-x
r-x
r-x
r-x
r-x
r-x
—
—
—
—
—
—
—
bit 16
R/W-0
R/W-0
R/W-0
R/W-0
R-0
r-x
r-x
r-x
ON
FRZ
SIDL
TWDIS
TWIP
—
—
—
bit 15
bit 8
R/W-0
r-x
R/W-0
R/W-0
r-x
R/W-0
R/W-0
r-x
TGATE
—
TCKPS<1:0>
—
TSYNC
TCS
—
bit 7
bit 0
Legend:
R = Readable bit
U = Unimplemented bit
W = Writable bit
P = Programmable bit
-n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
r = Reserved bit
bit 31-16
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10-8
Reserved: Write ‘0’; ignore read
ON: Timer On bit
1 = Timer is enabled
0 = Timer is disabled
FRZ: Freeze in Debug Exception Mode bit
1 = Freeze operation when CPU is in Debug Exception mode
0 = Continue operation when CPU is in Debug Exception mode
Note: FRZ is writable in Debug Exception mode only, it is forced to ‘0’ in normal mode.
SIDL: Stop in Idle Mode bit
1 = Discontinue operation when device enters Idle mode
0 = Continue operation in Idle mode
TWDIS: Asynchronous Timer Write Disable bit
In Asynchronous Timer mode:
1 = Writes to asynchronous TMR1 are ignored until pending write operation completes
0 = Back-to-back writes are enabled (legacy asynchronous timer functionality)
In Synchronous Timer mode:
This bit has no effect.
TWIP: Asynchronous Timer Write in Progress bit
In Asynchronous Timer mode:
1 = Asynchronous write to TMR1 register in progress
0 = Asynchronous write to TMR1 register complete
In Synchronous Timer mode:
This bit is read as ‘0’.
Reserved: Write ‘0’; ignore read
DS61143E-page 330
Preliminary
© 2008 Microchip Technology Inc.