PIC32MX440F256H-80I Datasheet, PDF (108/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
6.4 PIC32MX3XX/4XX Address Map
Table 6-2 shows the address map of the
PIC32MX3XX/4XX microcontroller.
On reset, the PIC32MX3XX/4XX starts executing code
from 0xBFC0_0000 virtual address which reside in the
kseg1 segment (non cacheable segment).
6.4.1 PHYSICAL MEMORY ADDRESS
The Kernel Program Flash address space starts at
physical address 0x1D000000, whereas the user pro-
gram flash space starts at physical address
0xBD000000 + BMXPUPBA register value.
Similarly, the internal RAM is also divided into Kernel
and User partitions. The kernel RAM space starts at
physical address 0x00000000, whereas the User RAM
space starts at physical address 0xBF000000 +
BMXDUDBA register value.
By default the entire Flash memory and RAM are
mapped to the Kernel mode application only.
TABLE 6-2:
PIC32MX3XX/4XX ADDRESS MAP
Virtual Addresses
Physical Addresses
Memory Type Begin Address End Address Begin Address End Address
Boot Flash
Program
Flash⁽¹⁾
Program
Flash⁽²⁾
RAM (Data)
RAM (Prog)
Peripheral
Program
Flash
RAM (Data)
RAM (Prog)
0xBFC00000
0xBD000000
0x9D000000
0x80000000
0x80000000 +
BMXDKPBA
0xBF800000
0x7D000000 +
BMXPUPBA
0x7F000000 +
BMXDUDBA
0x7F000000 +
BMXDUPBA
0xBFC02FFF
0xBD000000 +
BMXPUPBA - 1
0x9D000000 +
BMXPUPBA - 1
0x80000000 +
BMXDKPBA - 1
0x80000000 +
BMXDUDBA -1
0xBF8FFFFF
0x7D000000 +
PFM Size - 1
0x7F000000 +
BMXDUPBA - 1
0x7F000000 +
RAM Size⁽³⁾ - 1
0x1FC00000
0x1D000000
0x1D000000
0x00000000
BMXDKPBA
0x1F800000
0xBD000000 +
BMXPUPBA
0xBF000000 +
BMXDUDBA
0xBF000000 +
BMXDUPBA
0x1FC02FFF
0x1D00000 +
BMXPUPBA - 1
0x1D000000 +
BMXPUPBA - 1
BMXDKPBA - 1
BMXDUDBA -1
0x1F8FFFFF
0xBD000000 +
PFM Size - 1
0xBF000000 +
BMXDUPBA - 1
0xBF000000 +
RAM Size⁽³⁾ - 1
Size in Bytes
Calculation
12 KB
BMXPUPBA
BMXPUPBA
BMXDKPBA
BMXDUDBA -
BMXDKPBA
1 MB
PFM Size -
BMXPUPBA
BMXDUPBA -
BMXDUDBA
DRM Size -
BMXDUPBA
Note 1: Program Flash virtual addresses in the non-cacheable range (KSEG1).
2: Program Flash virtual addresses in the cacheable and prefetchable range (KSEG0).
3: The RAM size varies between PIC32MX3XX/4XX device family members.
DS61143E-page 106
Preliminary
© 2008 Microchip Technology Inc.