PIC32MX440F256H-80I Datasheet, PDF (205/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
TABLE 10-8: DMA CHANNEL 2 SFR SUMMARY
Virtual
Address⁽¹⁾
Name
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1 24/16/8/0
BF88_31E0
DCH2CON
31:24
—
—
—
—
—
—
—
—
23:16
—
—
—
—
—
—
—
—
15:8
—
—
—
—
—
—
—
CHCHNS
7:0
CHEN
CHAED
CHCHN CHAEN
—
CHEDET
CHPRI<1:0>
BF88_31E4 DCH2CONCLR 31:0
BF88_31E8 DCH2CONSET 31:0
BF88_31EC DCH2CONINV 31:0
Write clears selected bits in DCH2CON, read yields undefined value
Write sets selected bits in DCH2CON, read yields undefined value
Write inverts selected bits in DCH2CON, read yields undefined value
BF88_31F0 DCH2ECON 31:24
—
—
—
—
—
—
—
—
23:16
15:8
CHAIRQ<7:0>
CHSIRQ<7:0>
7:0 CFORCE CABORT
PATEN
SIRQEN AIRQEN
—
—
—
BF88_31F4 DCH2ECONCLR 31:0
Write clears selected bits in DCH2ECON, read yields undefined value
BF88_31F8 DCH2ECONSET 31:0
BF88_31FC DCH2ECONINV 31:0
Write sets selected bits in DCH2ECON, read yields undefined value
Write inverts selected bits in DCH2ECON, read yields undefined value
BF88_3200
DCH2INT
31:24
—
—
—
—
—
—
—
—
23:16
15:8
7:0
CHSDIE
—
CHSDIF
CHSHIE
—
CHSHIF
CHDDIE
—
CHDDIF
CHDHIE
—
CHDHIF
CHBCIE
—
CHBCIF
CHCCIE
—
CHCCIF
CHTAIE
—
CHTAIF
CHERIE
—
CHERIF
BF88_3204 DCH2INTCLR 31:0
Write clears selected bits in DCH2INT, read yields undefined value
BF88_3208
BF88_320C
BF88_3210
DCH2INTSET
DCH2INTINV
DCH2SSA
31:0
31:0
31:24
Write sets selected bits in DCH2INT, read yields undefined value
Write inverts selected bits in DCH2INT, read yields undefined value
CHSSA<31:24>
23:16
CHSSA<23:16>
15:8
7:0
BF88_3214 DCH2SSACLR 31:0
CHSSA<15:8>
CHSSA<7:0>
Write clears selected bits in DCH2SSA, read yields undefined value
BF88_3218 DCH2SSASET 31:0
Write sets selected bits in DCH2SSA, read yields undefined value
BF88_321C
BF88_3220
DCH2SSAINV
DCH2DSA
31:0
31:24
Write inverts selected bits in DCH2SSA, read yields undefined value
CHDSA<31:24>
23:16
CHDSA<23:16>
15:8
CHDSA<15:8>
7:0
BF88_3224 DCH2DSACLR 31:0
CHDSA<7:0>
Write clears selected bits in DCH2DSA, read yields undefined value
BF88_3228 DCH2DSASET 31:0
Write sets selected bits in DCH2DSA, read yields undefined value
BF88_322C DCH2DSAINV 31:0
BF88_3230
DCH2SSIZ
31:24
—
23:16
—
Write inverts selected bits in DCH2DSA, read yields undefined value
—
—
—
—
—
—
—
—
—
—
—
—
—
—
15:8
—
—
—
—
—
—
—
—
7:0
BF88_3234 DCH2SSIZCLR 31:0
BF88_3238 DCH2SSIZSET 31:0
CHSSIZ<7:0>
Write clears selected bits in DCH2SSIZ, read yields undefined value
Write sets selected bits in DCH2SSIZ, read yields undefined value
BF88_323C DCH2SSIZINV 31:0
Write inverts selected bits in DCH2SSIZ, read yields undefined value
BF88_3240
DCH2DSIZ
31:24
—
—
—
—
—
—
—
—
23:16
—
—
—
—
—
—
—
—
15:8
—
—
—
—
—
—
—
—
7:0
CHDSIZ<7:0>
BF88_3244 DCH2DSIZCLR 31:0
BF88_3248 DCH2DSIZSET 31:0
Write clears selected bits in DCH2DSIZ, read yields undefined value
Write sets selected bits in DCH2DSIZ, read yields undefined value
BF88_324C DCH2DSIZINV 31:0
Write inverts selected bits in DCH2DSIZ, read yields undefined value
Note 1: The starting address of the registers for DMA channel n is 0xbf883060 + 0xc0*n.
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 203