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PIC32MX440F256H-80I Datasheet, PDF (357/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers
PIC32MX3XX/4XX
15.0 INPUT CAPTURE
Note:
This data sheet summarizes the features of
the PIC32MX3XX/4XX family of devices. It
is not intended to be a comprehensive refer-
ence source. Refer to the “PIC32MX Family
Reference Manual” (DS61132) for a
detailed description of this peripheral.
The input capture module is useful in applications
requiring frequency (period) and pulse measurement.
The PIC32MX3XX/4XX devices support up to five input
capture channels.
The input capture module captures the 16-bit or 32-bit
value of the selected Time Base registers when an
event occurs at the ICx pin. The events that cause a
capture event are listed below in three categories:
1. Simple Capture Event modes
- Capture timer value on every falling edge of
input at ICx pin
- Capture timer value on every rising edge of
input at ICx pin
2. Capture timer value on every edge (rising and
falling)
3. Capture timer value on every edge (rising and
falling), specified edge first.
4. Prescaler Capture Event modes
- Capture timer value on every 4th rising edge
of input at ICx pin
- Capture timer value on every 16th rising
edge of input at ICx pin
Each input capture channel can select between one of
two 16-bit timers (Timer2 or Timer3) for the time base,
or two 16-bit timers (Timer2 and Timer3) together to
form a 32-bit timer. The selected timer can use either
an internal or external clock.
Other operational features include:
• Device wake-up from capture pin during CPU
Sleep and Idle modes
• Interrupt on input capture event
• 4-word FIFO buffer for capture values
- Interrupt optionally generated after 1, 2, 3 or
4 buffer locations are filled
• Input capture can also be used to provide
additional sources of external interrupts
FIGURE 15-1:
INPUT CAPTURE BLOCK DIAGRAM
ICx Input
Timer 3 Timer 2
Prescaler
1, 4, 16
Edge Detect
ICTMR
ICC32
FIFO Control
0
1
ICxBUF<31:16> ICxBUF<15:0>
ICM<2:0>
ICM<2:0>
ICFEDGE
ICxCON
ICBNE
ICOV
ICI<1:0>
Interrupt
Event
Generation
Data Space Interface
© 2008 Microchip Technology Inc.
Interrupt
Preliminary
Peripheral Data Bus
DS61143E-page 355