PIC32MX440F256H-80I Datasheet, PDF (536/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
EXAMPLE 23-3: PLACING DEVICE IN IDLE AND WAKING BY ADC EVENT
// Code example to put the Device in Idle and then Wake the device when the ADC completes
// a conversion
SYSKEY = 0x0;
// write invalid key to force lock
SYSKEY = 0xAA996655;
// Write Key1 to SYSKEY
SYSKEY = 0x556699AA;
// Write Key2 to SYSKEY
OSCCONCLR = 0x10;
// set Power-Saving mode to Idle
SYSKEY = 0x0;
// write invalid key to force lock
asm volatile ( “wait” ); // put device in selected Power-Saving mode
// code execution will resume here after wake and the ISR is complete
... user code ...
// interrupt handler
void __ISR(_ADC_VECTOR, ipl7) ADC_HANDLER(void)
{
// interrupt handler
unsigned long int result;
result = ADC1BUF0;
IFS1CLR = 2;
}
// read the result
// Clear ADC conversion interrupt flag
23.8 Interrupts
There are two sources of interrupts that will wake the
device from a Power-Saving mode: peripheral inter-
rupts, and a Non-Maskable Interrupt (NMI) generated
by the WDT in Power-Saving mode.
23.9 Wake-Up from SLEEP or IDLE on
Peripheral Interrupt
Any source of interrupt that is individually enabled
using the corresponding IE control bit in the IECx reg-
ister and is operational in the current Power-Saving
mode will be able to wake-up the processor from
SLEEP or IDLE mode. When the device wakes, one of
two events will occur, based on the interrupt priority:
• If the assigned priority for the interrupt is less
than, or equal to, the current CPU priority, the
CPU will remain halted and the device enters, or
remains in, IDLE mode.
• If the assigned priority level for the interrupt
source is greater than the current CPU priority,
the device will wake-up and the CPU will jump to
the corresponding interrupt vector. Upon
completion of the ISR, the CPU will start
executing the next instruction after WAIT.
The IDLE Status bit (RCON<2>) is set upon wake-up
from IDLE mode. The SLEEP Status bit (RCON<3>) is
set upon wake-up from SLEEP mode.
Notes: A peripheral with an interrupt priority set-
ting of zero cannot wake the device.
Any applicable oscillator start-up delays
are applied before the CPU resumes
code execution.
DS61143E-page 534
Preliminary
© 2008 Microchip Technology Inc.