PIC32MX440F256H-80I Datasheet, PDF (172/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
8.4 Multi-Vector Mode
When the MVEC (INTCON<12>) bit is ‘1’, the interrupt
controller operates in Multi-Vector mode. In this mode,
the CPU vectors to the unique address for each vector
number. Each vector is located at a specific offset, with
respect to a base address specified by the EBase reg-
ister in the CPU. The individual vector address offset is
determined by the vector space that is specified by the
VS bits in the IntCtl register. (The IntCtl register is
located in the CPU; refer to Section 2.0 "PIC32MX
MCU" of this manual for more information.)
To configure the CPU in Multi-Vector mode, the follow-
ing CPU registers (IntCtl, Cause, and Status) and the
INTCON register must be configured as follows:
• EBase ≠ 00000
• VS (IntCtl<9:5>) ≠ 00000
• IV (Cause<23>) = 1
• EXL (Status<1>) = 0
• BEV (Status<22>) = 0
• MVEC (INTCON<12>) = 1
• IE (Status<0>) = 1
EXAMPLE 8-2: MULTI-VECTOR MODE INITIALIZATION
/*
Set the CP0 registers for multi-vector interrupt
Place EBASE at 0xBD000000 and Vector Spacing to 32 bytes
This code example uses MPLAB C32 intrinsic functions to access CP0 registers.
Check your compiler documentation to find equivalent functions or use inline assembly
*/
unsigned int temp;
asm volatile(“di”);
// Disable all interrupts
temp = _CP0_GET_STATUS();
temp |= _CPO_STATUS_BEV_MASK;
_CP0_SET_STATUS(temp);
// Get the CPO Status register
// Set the BEV bit
// Update the Status register
_CP0_SET_EBASE(0xBD000000);
_CP0_SET_INTCTL(0x20);
// Set an EBASE Value (Kseg0 or Kseg1)
// Set the Vector Spacing
temp = _CP0_GET_CAUSE();
temp |= _CPO_CAUSE_IV_MASK;
_CP0_SET_CAUSE(temp);
// Get the CPO Cause register
// Set the IV bit
// Update the Cause register
temp = _CP0_GET_STATUS();
temp &= ~(_CPO_STATUS_EXL_MASK|
_CPO_STATUS_BEV_MASK;
_CP0_SET_STATUS(temp);
// Get the CPO Status register
// Clear EXL and BEV bits
// Update the Status register
INTCONSET = _INTCON_MVEC_MASK;
// Set the interrupt controller to multi-vectored mode
asm volatile(“ei”);
// Enable all interrupts
asm volatile(“ie”);
// Enable all interrupts
DS61143E-page 170
Preliminary
© 2008 Microchip Technology Inc.