PIC32MX440F256H-80I Datasheet, PDF (309/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
12.1 Port Registers
TABLE 12-1: PORTA SFR SUMMARY
Virtual
Address
Name
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1 24/16/8/0
BF88_6000 TRISA 31:24
—
—
—
—
—
—
—
—
23:16
—
—
—
—
—
—
—
—
15:8 TRISA15 TRISA14
—
—
—
TRISA10 TRISA9
—
7:0
TRISA<7:0>
BF88_6004 TRISACLR 31:0
Write clears selected bits in TRISA, read yields undefined value
BF88_6008 TRISASET 31:0
Write sets selected bits in TRISA, read yields undefined value
BF88_600C TRISAINV 31:0
Write inverts selected bits in TRISA, read yields undefined value
BF88_6010 PORTA 31:24
—
—
—
—
—
—
—
—
23:16
—
—
—
—
—
—
—
—
15:8 RA15
RA14
—
—
—
RA10
RA9
—
7:0
RA<7:0>
BF88_6014 PORTACLR 31:0
Write clears selected bits in PORTA, read yields undefined value
BF88_6018 PORTASET 31:0
Write sets selected bits in PORTA, read yields undefined value
BF88_601C PORTAINV 31:0
Write inverts selected bits in PORTA, read yields undefined value
BF88_6020
LATA 31:24
—
—
—
—
—
—
—
—
23:16
—
—
—
—
—
—
—
—
15:8 LATA15 LATA14
—
—
—
LATA10 LATA9
—
7:0
LATA<7:0>
BF88_6024 LATACLR 31:0
Write clears selected bits in LATA, read yields undefined value
BF88_6028 LATASET 31:0
Write sets selected bits in LATA, read yields undefined value
BF88_602C LATAINV 31:0
Write inverts selected bits in LATA, read yields undefined value
BF88_6030 ODCA 31:24
—
—
—
—
—
—
—
—
23:16
—
—
—
—
—
—
—
—
15:8 ODCA15 ODCA14
—
—
—
ODCA10 ODCA9
—
7:0
ODCA<7:0>
BF88_6034 ODCACLR 31:0
Write clears selected bits in ODCA, read yields undefined value
BF88_6038 ODCFASET 31:0
Write sets selected bits in ODCA, read yields undefined value
BF88_603C ODCAINV 31:0
Write inverts selected bits in ODCA, read yields undefined value
Notes: TRISA, PORTA, LATA and ODCA registers are not implemented on 64-pin devices, and read as ‘0’.
JTAG program/debug port is multiplexed with port pins RA0, RA1, RA4 and RA5 on 100-pin devices. At power-on-reset,
these pins are controlled by the JTAG port. To use these pins for general purpose I/O, the user’s application code must
clear JTAGEN (DDPCON<3>) bit = 0. To use these pins for JTAG program/debug, the user’s application code must
maintain JTAGEN bit = 1.
On specific 100-pin devices, the instruction TRACE port is multiplexed with PORTA pins RA6, RA7; PORTG pins RG12,
RG13 and RG14. At Power-on Reset, these pins are general purpose I/O pins. To maintain these pins as general pur-
pose I/O pins, the user’s application code must maintain TROEN (DDPCON<2>) bit = 0. To use these pins as instruction
TRACE pins, TROEN must be set = 1.
© 2008 Microchip Technology Inc.
Preliminary
DS61143E - page 307