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PIC32MX440F256H-80I Datasheet, PDF (587/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers
PIC32MX3XX/4XX
TABLE 28-5: MICROCHIP TAP IR COMMANDS
Opcode
Name
Device Integration
0x01
0x07
0x04
0x05
MTAP_IDCODE
MTAP_COMMAND
MTAP_SW_MTAP
MTAP_SW_ETAP
Shifts out the device’s ID code
Configures Microchip TAP controller for DR commands
Selects Microchip TAP controller
Selects EJTAG TAP controller
TABLE 28-6: MICROCHIP TAP 8-BIT DR COMMANDS
Opcode
Name
Device Integration
0x00
0xD1
0xD0
0xFC
0xFE
0xFD
0xFF
MCHP_STATUS
Performs NOP and returns status
MCHP_ASERT_RST
Requests Assert Device Reset
MCHP_DE_ASSERT_RST Requests Deassert Device Reset
MCHP_ERASE
Performs a chip erase
MCHP_FLASH_ENABLE Enables fetches and loads to the Flash from the CPU
MCHP_FLASH_DISABLE Disables fetches and loads to the Flash from the CPU
MCHP_READ_CONFIG Forces device to reread the configuration settings and initialize accordingly
TABLE 28-7: EJTAG COMMANDS
Opcode
Name
Device Integration
Data Length for the
Following DR
0x00
Not used
0x01 IDCODE
Selects the device’s ID Code register
32 bits
0x02
Not used
0x03
0x04(2)
0x05(2)
IMPCODE
Selects Implementation register
MTAP_SW_MTAP Selects Microchip TAP controller
MTAP_SW_ETAP Selects EJTAG TAP controller(1)
0x06-0x07
Not used
0x08 ADDRESS
Selects the Address register
32 bits
0x09
0x0A
0x0B
DATA
CONTROL
ALL
Selects the Data register
Selects the EJTAG Control register(1)
Selects the Address, Data, EJTAG Control register(1)
32 bits
32 bits
96 bits
0x0C EJTAGBOOT
Forces the CPU to take a debug exception after boot
1 bit
0x0D NORMALBOOT Makes the CPU execute the reset handler after a boot
1 bit
0x0E FASTDATA
Selects the Data and Fast Data registers
1 bit
0x0F-0x1B
Reserved
0x1C-0xFE
Not used
0xFF
Selects the Bypass register
Note 1: For complete information about EJTAG commands and protocol, refer to the EJTAG Specification
available on MIPS Technologies web site, www.mips.com.
2: Not EJTAG commands but are recognized by the Microchip implementation.
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 585