PIC32MX440F256H-80I Datasheet, PDF (177/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
8.7 External Interrupts
The interrupt controller supports five external interrupt-
request signals (INT4-INT0). These inputs are edge
sensitive; they require a low-to-high or a high-to-low
transition to create an interrupt request. The INTCON
register has five bits that select the polarity of the edge
detection circuitry: INT4EP (INTCON<4>), INT3EP
(INTCON<3>), INT2EP (INTCON<2>), INT1EP (INT-
CON<1>) and INT0EP (INTCON<0>).
Note:
Changing the external interrupt polarity
may trigger an interrupt request. It is rec-
ommended that before changing the
polarity, the user disables that interrupt,
changes the polarity, clears the interrupt
flag and re-enables the interrupt.
EXAMPLE 8-11: SETTING EXTERNAL INTERRUPT POLARITY
/*
The following code example will set INT3 to trigger on a high to low transition edge. The CPU
must be set up for either multi or single vector interrupts to handle external interrupts
*/
IEC0CLR = 0x00008000;
// disable INT3
INTCONCLR = 0x00000008;
// clear the bit for falling edge trigger
IFS0CLR = 0x00008000;
// clear the interrupt flag
IEC0SET = 0x00008000;
// enable INT3
8.8 Temporal Proximity Interrupt
Coalescing
The PIC32MX3XX/4XX CPU responds to interrupt
events as if they are all immediately critical because
the interrupt controller asserts the interrupt request to
the CPU when the interrupt request occurs. The CPU
immediately recognizes the interrupt if the current CPU
priority is lower than the pending priority. Entering and
exiting an ISR consumes clock cycles for saving and
restoring context. Events are asynchronous with
respect to the main program and have a limited
possibility of occurring simultaneously or close together
in time. This prevents the ability of a shared ISR to
process multiple interrupts at one time.
Interrupt proximity interrupt uses the interrupt proximity
timer, IPTMR, to create a temporal window in which a
group of interrupts of the same, or lower, priority will be
held off. The user can activate temporal proximity inter-
rupt coalescing by performing the following steps:
• Set the TPC<2:0> INTCON<10:8> bit to the pre-
ferred priority level. (Setting TPC to zero will dis-
able the proximity timer.)
• Load the preferred 32-bit value to IPTMR.
The interrupt proximity timer will trigger when an inter-
rupt request of a priority equal, or lower, matches the
TPC value.
EXAMPLE 8-12: INTERRUPT PROXIMITY INTERRUPT COALESCING EXAMPLE
/*
The following code example will set the Interrupt Proximity Coalescing to trigger on interrupt
priority level of 3 or below and the interrupt timer to be set to 0x12345678.
*/
INTCONCLR = 0x00000700;
IPTMPCLR = 0xFFFFFFFF;
INTCONSET = 0x00000300;
IPTMR = 0x12345678;
// clear TPC
// clear the timer
// set TPC->3
// set the timer to 0x12345678
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 175