PIC32MX440F256H-80I Datasheet, PDF (57/646 Pages) Microchip Technology – 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers

PIC32MX3XX/4XX
4.1 Control Registers
The Oscillator module consists of the following Special
Function Registers (SFRs):
• OSCCON: Control Register for the Oscillator
module
OSCCONCLR, OSCCONSET, OSCCONINV:
Atomic Bit Manipulation Write-only Registers for
OSCCON register
• OSCTUN: FRC Tuning Register for the Oscillator
module
OSCTUNCLR, OSCTUNSET, OSCTUNINV: Atomic
Bit Manipulation Write-only Registers for OSCTUN
register
The Oscillator module also has the following
associated bits for interrupt control:
• Interrupt Flag Status bits (IFS1<14>) for Clock
Fail FSCMIF in IFS1 Interrupt register
• Interrupt Enable Control bits (IEC1<14>) for Clock
Fail FSCMIE in IEC1 Interrupt register
• Interrupt Priority Control bits (FSCMIP<12:10>)
for Clock Fail in IPC8 Interrupt register
• Interrupt Subpriority Control bits (FSCMIP<9:8>)
for Clock Fail in IPC8 Interrupt register
The following tables provide brief summaries of
Oscillator-module-related registers. Corresponding
registers appear after the summaries, followed by a
detailed description of each register.
TABLE 4-1: OSCILLATOR SFR SUMMARY
Virtual
Address
Name
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
Bit
28/20/12/ 27/19/11/
4
3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
BF80_F000
BF80_F004
BF80_F008
BF80_F00C
BF80_F010
BF80_F014
BF80_F018
BF80_F01C
OSCCON
OSCCONCLR
OSCCONSET
OSCCONINV
OSCTUN
OSCTUNCLR
OSCTUNSET
OSCTUNINV
31:24
23:16
15:8
7:0
31:0
31:0
31:0
31:24
23:16
15:8
7:0
31:0
31:0
31:0
—
—
—
CLKLOCK
—
—
—
—
—
PLLODIV<2:0>
FRCDIV<2:0>
SOSCRDY
—
PBDIV<1:0>
PLLMULT<2:0>
COSC<2:0>
—
NOSC<2:0>
ULOCK
LOCK
SLPEN
CF
UFRCEN SOSCEN OSWEN
Write clears selected bits in OSCCON, read yields undefined value
Write sets selected bits in OSCCON, read yields undefined value
Write inverts selected bits in OSCCON, read yields undefined value
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TUN<5:0>
Write clears selected bits in OSCTUN, read yields undefined value
Write sets selected bits in OSCTUN, read yields undefined value
Write inverts selected bits in OSCTUN, read yields undefined value
TABLE 4-2: WATCHDOG TIMER SFR SUMMARY⁽¹⁾
Virtual
Address
Name
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
Bit
28/20/12/ 27/19/11/
4
3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
BF80_0000 WDTCON
15:8
ON
—
—
—
—
—
—
—
Note 1: This summary table contains partial register definitions that only pertain to the Oscillator peripheral. Refer to the
“PIC32MX Family Reference Manual” (DS61132) for a detailed description of these registers.
© 2008 Microchip Technology Inc.
Preliminary
DS61143E-page 55