3069RF-ZTAT Datasheet, PDF (9/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

Contents
Section 1 Overview............................................................................................1
1.1 Overview........................................................................................................................... 1
1.2 Block Diagram .................................................................................................................. 6
1.3 Pin Description.................................................................................................................. 7
1.3.1 Pin Arrangement .................................................................................................. 7
1.3.2 Pin Functions ....................................................................................................... 8
1.3.3 Pin Assignments in Each Mode ........................................................................... 13
Section 2 CPU....................................................................................................17
2.1 Overview........................................................................................................................... 17
2.1.1 Features................................................................................................................ 17
2.1.2 Differences from H8/300 CPU ............................................................................ 18
2.2 CPU Operating Modes ...................................................................................................... 19
2.3 Address Space................................................................................................................... 20
2.4 Register Configuration...................................................................................................... 21
2.4.1 Overview.............................................................................................................. 21
2.4.2 General Registers ................................................................................................. 22
2.4.3 Control Registers ................................................................................................. 23
2.4.4 Initial CPU Register Values ................................................................................. 24
2.5 Data Formats..................................................................................................................... 25
2.5.1 General Register Data Formats ............................................................................ 25
2.5.2 Memory Data Formats ......................................................................................... 27
2.6 Instruction Set ................................................................................................................... 28
2.6.1 Instruction Set Overview ..................................................................................... 28
2.6.2 Instructions and Addressing Modes..................................................................... 29
2.6.3 Tables of Instructions Classified by Function...................................................... 30
2.6.4 Basic Instruction Formats .................................................................................... 39
2.6.5 Notes on Use of Bit Manipulation Instructions.................................................... 40
2.7 Addressing Modes and Effective Address Calculation..................................................... 42
2.7.1 Addressing Modes ............................................................................................... 42
2.7.2 Effective Address Calculation ............................................................................. 44
2.8 Processing States............................................................................................................... 48
2.8.1 Overview.............................................................................................................. 48
2.8.2 Program Execution State...................................................................................... 49
2.8.3 Exception-Handling State .................................................................................... 49
2.8.4 Exception-Handling Sequences ........................................................................... 51
2.8.5 Bus-Released State............................................................................................... 52
2.8.6 Reset State............................................................................................................ 52
2.8.7 Power-Down State ............................................................................................... 52
Rev. 5.0, 09/04, page v of xviii