3069RF-ZTAT Datasheet, PDF (638/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

Start programming
procedure program
Select on-chip program
to be downloaded and
set download destination
(a)
by FTDAR
Set FKEY to H'A5
(b)
Set SCO to 1 and
(c)
execute download
Clear FKEY to 0
(d)
DFPR=0?
Yes
(e)
No
Download error processing
Set the FPEFEQ and
FUBRA parameters
(f)
Initialization
JSR FTDAR setting+32 (g)
FPFR=0?
Yes
1
(h)
No
Initialization error processing
1
Disable interrupts and bus
master operation other
than CPU
(i)
Set FKEY to H'5A
(j)
Set parameter to ER0 and
ER1 (FMPAR and FMPDR)
(k)
Programming
JSR FTDAR setting+16
(l)
FPFR=0?
(m)
No
Yes
Clear FKEY and
programming
error processing
No
Required data
programming is
completed?
(n)
Yes
Clear FKEY to 0
(o)
End programming
procedure program
Figure 18.11 Programming Procedure
The details of the programming procedure are described below. The procedure program must be
executed in an area other than the flash memory to be programmed. Especially the part where the
SCO bit in FCCS is set to 1 for downloading must be executed in the on-chip RAM.
The area that can be executed in the steps of the user procedure program (on-chip RAM, user
MAT, and external space) is shown in section 18.10.3, Procedure Program and Storable Area for
Programming Data.
The following description assumes the area to be programmed on the user MAT is erased and
program data is prepared in the consecutive area. When erasing is not executed, erasing is
executed before writing.
128-byte programming is performed in one program processing. When more than 128-byte
programming is performed, programming destination address/program data parameter is updated
in 128-byte units and programming is repeated.
When less than 128-byte programming is performed, data must total 128 bytes by adding the
invalid data. If the invalid data to be added is H'FF, the program processing period can be shorted.
Rev. 5.0, 09/04, page 616 of 978