3069RF-ZTAT Datasheet, PDF(547/1003 Page) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

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3069RF-ZTAT Datasheet, PDF (547/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

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5. If the transmitting device does not receive an error signal, it proceeds to transmit the next data

frame. If it receives an error signal, however, it returns to step 2 and transmits the same data

again.

14.3.4 Register Settings

Table 14.3 shows a bit map of the registers used in the smart card interface. Bits indicated as 0 or

1 must be set to the value shown. The setting of other bits is described in this section.

Table 14.3 Smart Card Interface Register Settings

Bit

Register Address*1 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

SMR

H'FFFB0 GM

0

1

O/E 1

0

CKS1 CKS0

BRR

H'FFFB1 BRR7 BRR6 BRR5 BRR4 BRR3 BRR2 BRR1 BRR0

SCR

H'FFFB2 TIE

RIE

TE

RE

0

0

CKE1*2 CKE0

TDR

H'FFFB3 TDR7 TDR6 TDR5 TDR4 TDR3 TDR2 TDR1 TDR0

SSR

H'FFFB4 TDRE RDRF ORER ERS PER TEND 0

0

RDR

H'FFFB5 RDR7 RDR6 RDR5 RDR4 RDR3 RDR2 RDR1 RDR0

SCMR H'FFFB6 â

â

â

â

SDIR SINV â

SMIF

Notes: â Unused bit.

1. Lower 20 bits of the address in advanced mode.

2. When GM is cleared to 0 in SMR, the CKE1 bit must also be cleared to 0.

Serial Mode Register (SMR) Settings: Clear the GM bit to 0 when using the normal smart card

interface mode, or set to 1 when using GSM mode. Clear the O/E bit to 0 if the smart card is of the

direct convention type, or set to 1 if of the inverse convention type.

Bits CKS1 and CKS0 select the clock source of the built-in baud rate generator. See section

14.3.5, Clock.

Bit Rate Register (BRR) Settings: BRR is used to set the bit rate. See section 14.3.5, Clock, for

the method of calculating the value to be set.

Serial Control Register (SCR) Settings: The TIE, RIE, TE, and RE bits have their normal serial

communication functions. See section 13, Serial Communication Interface, for details. The CKE1

and CKE0 bits specify clock output. To disable clock output, clear these bits to 00; to enable clock

output, set these bits to 01. Clock output is not performed when the GM bit is set to 1 in SMR.

Clock output can also be fixed low or high.

Rev. 5.0, 09/04, page 525 of 978

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