3069RF-ZTAT Datasheet, PDF (429/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

10.7.5 Contention between Counter Clearing by Input Capture and Counter Increment
If an input capture signal and counter increment signal occur simultaneously, counter clearing by
the input capture signal takes priority and the counter is not incremented. The value before the
counter is cleared is transferred to TCORB. Figure 10.22 shows the timing in this case.
T1
T2
T3
φ
Input capture signal
Counter clear signal
8TCNT internal clock
8TCNT
N
H'00
TCORB
X
N
Figure 10.22 Contention between Counter Clearing by Input Capture and Counter
Increment
Rev. 5.0, 09/04, page 407 of 978