3069RF-ZTAT Datasheet, PDF (325/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

8.12.2 Register Descriptions
Table 8.22 summarizes the registers of port B.
Table 8.22 Port B Registers
Address*
Name
Abbreviation R/W
H'EE00A
Port B data direction register PBDDR
W
H'FFFDA
Port B data register
PBDR
R/W
Note: * Lower 20 bits of the address in advanced mode.
Initial Value
H'00
H'00
Port B Data Direction Register (PBDDR): PBDDR is an 8-bit write-only register that can select
input or output for each pin in port B. When pins are used for TPC output, the corresponding
PBDDR bits must also be set.
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
PB₇ DDR PB₆ DDR PB₅ DDR PB₄ DDR PB₃ DDR PB₂ DDR PB₁ DDR PB₀ DDR
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
Port B data direction 7 to 0
These bits select input or output for port B pins
The pin functions that can be selected for port B differ between modes 1 to 5, and mode 7. For the
method of selecting the pin functions, see tables 8.23 and 8.24.
When port B functions as an input/output port, a pin in port B becomes an output port if the
corresponding PBDDR bit is set to 1, and an input port if this bit is cleared to 0.
PBDDR is a write-only register. Its value cannot be read. All bits return 1 when read.
PBDDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting. Therefore, if a transition is made to software standby mode while
port B is functioning as an input/output port and a PBDDR bit is set to 1, the corresponding pin
maintains its output state.
Rev. 5.0, 09/04, page 303 of 978