3069RF-ZTAT Datasheet, PDF (621/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

(b) Flash user branch address setting parameter (FUBRA: general register ER1 of CPU)
This parameter sets the user branch destination address. The user program which has been set can
be executed in specified processing units when programming and erasing.
Bit :
31
30
29
28
27
26
25
24
UA31 UA30 UA29 UA28 UA27 UA26 UA25 UA24
Bit :
23
22
21
20
19
18
17
16
UA23 UA22 UA21 UA20 UA19 UA18 UA17 UA16
Bit :
15
14
13
12
11
10
9
8
UA15 UA14 UA13 UA12 UA11 UA10 UA9 UA8
Bit :
7
6
5
4
3
2
1
0
UA7 UA6 UA5 UA4 UA3 UA2 UA1 UA0
Bits 31 to 0—User Branch Destination Address (UA31 to UA0): Not available in the
H8/3069R, address 0 (H'00000000) must be set.
The user branch destination must be the area other than the RAM area in which on-chip program
has been transferred or the external bus space.
Note that the CPU must not branch to an area without the execution code and get out of control.
The on-chip program download area and stack area must not be overwritten. If CPU runaway
occurs or the download area or stack area is overwritten, the value of flash memory cannot be
guaranteed.
The download of on-chip program, initialization, initiation of the programming/erasing program
must not be executed in the processing of the user branch destination. Programming or erasing
cannot be guaranteed when returning from the user branch destination. The program data which
has already been prepared must not be programmed.
Moreover, the programming/erasing interface register must not be programmed or RAM
emulation mode must not be entered in the processing of the user branch destination.
After the processing of the user branch is ended, the programming/erasing program must be
returned by using the RTS instruction.
(c) Flash pass/fail parameter (FPFR: general register R0L of CPU)
An explanation of FPFR as the return value indicating the initialization result is provided here.
Bit :
7
6
5
4
3
2
1
0
0
0
0
0
0
BR
FQ
SF
Bits 7 to 3—Unused: Return 0.
Rev. 5.0, 09/04, page 599 of 978